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LPC4317JET100E PDF预览

LPC4317JET100E

更新时间： 2024-10-28 15:37:35
品牌 Logo 应用领域
恩智浦 - NXP 时钟PC微控制器静态存储器外围集成电路
页数 文件大小 规格书
162页 3034K
描述
LPC435x/3x/2x/1x - 32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC BGA 100-Pin

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LPC4317JET100E 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：BGA包装说明：TFBGA, BGA100,10X10,32
针数：100Reach Compliance Code：compliant
风险等级：5.77具有ADC：YES
地址总线宽度：24位大小：32
CPU系列：CORTEX-M4最大时钟频率：25 MHz
DAC 通道：YESDMA 通道：YES
外部数据总线宽度：32JESD-30 代码：S-PBGA-B100
长度：9 mm湿度敏感等级：3
I/O 线路数量：49端子数量：100
最高工作温度：85 °C最低工作温度：-40 °C
PWM 通道：NO封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装等效代码：BGA100,10X10,32
封装形状：SQUARE封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2.5/3.3 V
认证状态：Not QualifiedRAM（字节）：139264
ROM（单词）：1048576ROM可编程性：FLASH
座面最大高度：1.2 mm速度：204 MHz
子类别：Microcontrollers最大供电电压：3.6 V
最小供电电压：2.2 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：9 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

LPC4317JET100E 数据手册

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LPC435x/3x/2x/1x  
32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 136 kB  
SRAM; Ethernet, two High-speed USB, LCD, EMC  
Rev. 5.3 — 15 March 2016  
Product data sheet  
1. General description  
The LPC435X_3X_2X_1X are ARM Cortex-M4 based microcontrollers with Floating Point  
Unit (FPU) for embedded applications which include an ARM Cortex-M0 coprocessor, up  
to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of EEPROM memory, two  
high-speed USB controllers, Ethernet, LCD, an external memory controller, a quad SPI  
Flash Interface (SPIFI) that supports execute-in-place, advanced configurable peripherals  
such as the State Configurable Timer (SCTimer/PWM) and the Serial General Purpose  
I/O (SGPIO) interface, and multiple digital and analog peripherals. The  
LPC435X_3X_2X_1X operate at CPU frequencies of up to 204 MHz.  
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power  
consumption, enhanced debug features, and a high level of support block integration. The  
ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with  
separate local instruction and data buses as well as a third bus for peripherals, and  
includes an internal prefetch unit that supports speculative branching. The ARM  
Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A  
hardware floating-point processor is integrated into the core.  
The ARM Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core,  
which is upward code- and tool-compatible with the Cortex-M4 core. It is ideal for handling  
control or peripheral handling to free up the Cortex-M4 for real-time processing. The  
Cortex-M0 coprocessor offers up to 204 MHz performance with a simple instruction set  
and reduced code size. In LPC43xx, the Cortex-M0 coprocessor hardware multiply is  
implemented as a 32-cycle iterative multiplier.  
For additional documentation related to the LPC43xx parts, see Section 17.  
2. Features and benefits  
Cortex-M4 Processor core  
ARM Cortex-M4 processor (version r0p1), running at frequencies of up to  
204 MHz.  
Built-in Memory Protection Unit (MPU) supporting eight regions.  
Built-in Nested Vectored Interrupt Controller (NVIC).  
Hardware floating-point unit.  
Non-maskable Interrupt (NMI) input.  
JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch  
points.  
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.  
System tick timer.  
 
 
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