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LPC2377 PDF预览

LPC2377

更新时间: 2024-10-26 05:42:35
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器以太网
页数 文件大小 规格书
55页 259K
描述
Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC

LPC2377 数据手册

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LPC2377/78  
Single-chip 16-bit/32-bit microcontroller; 512 kB flash with  
ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC  
Rev. 04 — 19 November 2008  
Product data sheet  
1. General description  
The LPC2377/78 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with  
real-time emulation that combines the microcontroller with 512 kB of embedded  
high-speed flash memory. A 128-bit wide memory interface and a unique accelerator  
architecture enable 32-bit code execution at the maximum clock rate. For critical  
performance in interrupt service routines and DSP algorithms, this increases performance  
up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit  
Thumb mode reduces code by more than 30 % with minimal performance penalty.  
The LPC2377/78 is ideal for multi-purpose serial communication applications. It  
incorporates a 10/100 Ethernet Media Access Controller (MAC), USB full speed device  
with 4 kB of endpoint RAM (LPC2378 only), four UARTs, two CAN channels (LPC2378  
only), an SPI interface, two Synchronous Serial Ports (SSP), three I2C-bus interfaces, an  
I2S-bus interface, and an External Memory Controller (EMC). This blend of serial  
communications interfaces combined with an on-chip 4 MHz internal oscillator, SRAM of  
32 kB, 16 kB SRAM for Ethernet, 8 kB SRAM for USB and general purpose use, together  
with 2 kB battery powered SRAM make this device very well suited for communication  
gateways and protocol converters. Various 32-bit timers, an improved 10-bit ADC, 10-bit  
DAC, PWM unit, a CAN control unit, and up to 104 fast GPIO lines with up to 50 edge and  
up to four level sensitive external interrupt pins make these microcontrollers particularly  
suitable for industrial control and medical systems.  
2. Features  
I ARM7TDMI-S processor, running at up to 72 MHz.  
I Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and  
In-Application Programming (IAP) capabilities. Flash program memory is on the ARM  
local bus for high performance CPU access.  
I 32 kB of SRAM on the ARM local bus for high performance CPU access.  
I 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.  
I 8 kB SRAM for general purpose DMA use also accessible by the USB.  
I Dual Advanced High-performance Bus (AHB) system that provides for simultaneous  
Ethernet DMA, USB DMA, and program execution from on-chip flash with no  
contention between those functions. A bus bridge allows the Ethernet DMA to access  
the other AHB subsystem.  
I EMC provides support for static devices such as flash and SRAM as well as off-chip  
memory mapped peripherals.  
I Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.  

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