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LMX2485SQ/NOPB PDF预览

LMX2485SQ/NOPB

更新时间: 2024-11-21 21:18:59
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
40页 428K
描述
IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PQCC24, 4 X 4 MM, 0.8 MM, PLASTIC, LLP-24, PLL or Frequency Synthesis Circuit

LMX2485SQ/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HVQCCN, LCC24,.16SQ,20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.39
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERJESD-30 代码:S-PQCC-N24
JESD-609代码:e3长度:4 mm
湿度敏感等级:3功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC24,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:3 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:PLL or Frequency Synthesis Circuits最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

LMX2485SQ/NOPB 数据手册

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February 27, 2008  
LMX2485/LMX2485E  
50 MHz - 3.0 GHz High Performance Delta-Sigma Low  
Power Dual PLLatinumFrequency Synthesizers with 800  
MHz Integer PLL  
Satellite and cable TV tuners  
General Description  
WLAN Standards  
The LMX2485 is a low power, high performance delta-sigma  
fractional-N PLL with an auxiliary integer-N PLL. The device  
Features  
is fabricated using National Semiconductor’s advanced pro-  
cess.  
Quadruple Modulus Prescalers for Lower Divide Ratios  
With delta-sigma architecture, fractional spurs at lower offset  
frequencies are pushed to higher frequencies outside the loop  
RF PLL: 8/9/12/13 or 16/17/20/21  
IF PLL: 8/9 or 16/17  
bandwidth. The ability to push close in spur and phase noise  
energy to higher frequencies is a direct function of the mod-  
ulator order. Unlike analog compensation, the digital feed-  
back technique used in the LMX2485 is highly resistant to  
changes in temperature and variations in wafer processing.  
The LMX2485 delta-sigma modulator is programmable up to  
fourth order, which allows the designer to select the optimum  
modulator order to fit the phase noise, spur, and lock time  
requirements of the system.  
Advanced Delta Sigma Fractional Compensation  
12 bit or 22 bit selectable fractional modulus  
Up to 4th order programmable delta-sigma modulator  
Features for Improved Lock Times and Programming  
Fastlock / Cycle slip reduction  
Integrated time-out counter  
Serial data for programming the LMX2485 is transferred via  
a three line high speed (20 MHz) MICROWIRE interface. The  
LMX2485 offers fine frequency resolution, low spurs, fast pro-  
gramming speed, and a single word write to change the  
frequency. This makes it ideal for direct digital modulation  
applications, where the N counter is directly modulated with  
information. The LMX2485 is available in a 24 lead  
4.0 X 4.0 X 0.8 mm LLP package.  
Single word write to change frequencies with Fastlock  
Wide Operating Range  
LMX2485 RF PLL: 500 MHz to 3.0 GHz  
LMX2485E RF PLL: 50 MHz to 3.0 GHz  
Useful Features  
Digital lock detect output  
Hardware and software power-down control  
Applications  
On-chip crystal reference frequency doubler.  
Cellular phones and base stations  
CDMA, WCDMA, GSM/GPRS, TDMA, EDGE, PDC  
RF phase comparison frequency up to 50 MHz  
2.5 to 3.6 volt operation with ICC = 5.0 mA at 3.0 V  
Direct digital modulation applications  
Functional Block Diagram  
20087701  
PLLatinumis a trademark of National Semiconductor Corporation.  
© 2008 National Semiconductor Corporation  
200877  
www.national.com  

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