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LMX2487SQX PDF预览

LMX2487SQX

更新时间: 2024-02-07 14:30:13
品牌 Logo 应用领域
美国国家半导体 - NSC 信号电路锁相环或频率合成电路
页数 文件大小 规格书
37页 859K
描述
3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum? Frequency Synthesizers with 3.0 GHz Integer PLL

LMX2487SQX 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:QCCN, LCC24,.16SQ,20
Reach Compliance Code:compliantECCN代码:5A991.G
HTS代码:8542.39.00.01风险等级:5.68
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERJESD-30 代码:S-PQCC-N24
JESD-609代码:e3湿度敏感等级:3
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCN封装等效代码:LCC24,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260电源:3 V
认证状态:Not Qualified子类别:PLL or Frequency Synthesis Circuits
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

LMX2487SQX 数据手册

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February 2006  
LMX2487  
3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low  
Power Dual PLLatinum Frequency Synthesizers with  
3.0 GHz Integer PLL  
n Direct digital modulation applications  
General Description  
n Satellite and cable TV tuners  
The LMX2487 is a low power, high performance delta-sigma  
n WLAN Standards  
fractional-N PLL with an auxiliary integer-N PLL. It is fabri-  
cated using National Semiconductor’s advanced process.  
Features  
With delta-sigma architecture, fractional spurs at lower offset  
frequencies are pushed to higher frequencies outside the  
loop bandwidth. The ability to push close in spur and phase  
noise energy to higher frequencies is a direct function of the  
modulator order. Unlike analog compensation, the digital  
feedback technique used in the LMX2487 is highly resistant  
to changes in temperature and variations in wafer process-  
ing. The LMX2487 delta-sigma modulator is programmable  
up to fourth order, which allows the designer to select the  
optimum modulator order to fit the phase noise, spur, and  
lock time requirements of the system.  
Quadruple Modulus Prescalers for Lower Divide Ratios  
n RF PLL: 16/17/20/21 or 32/33/36/37  
n IF PLL: 8/9 or 16/17  
Advanced Delta Sigma Fractional Compensation  
n 12 bit or 22 bit selectable fractional modulus  
n Up to 4th order programmable delta-sigma modulator  
Features for Improved Lock Times and Programming  
n Fastlock / Cycle slip reduction  
n Integrated time-out counter  
Serial data for programming the LMX2487 is transferred via  
a three line high speed (20 MHz) MICROWIRE interface.  
The LMX2487 offers fine frequency resolution, low spurs,  
fast programming speed, and a single word write to change  
the frequency. This makes it ideal for direct digital modula-  
tion applications, where the N counter is directly modulated  
with information. The LMX2487 is available in a 24 lead  
4.0 X 4.0 X 0.8 mm LLP package.  
n Single word write to change frequencies with Fastlock  
Wide Operating Range  
n LMX2487 RF PLL: 3.0 GHz to 6.0 GHz  
Useful Features  
n Digital lock detect output  
n Hardware and software power-down control  
n On-chip crystal reference frequency doubler.  
n RF phase comparison frequency up to 50 MHz  
n 2.5 to 3.6 volt operation with ICC = 8.5 mA at 3.0 V  
Applications  
n Cellular phones and base stations  
Functional Block Diagram  
20154701  
PLLatinum is a trademark of National Semiconductor Corporation.  
© 2006 National Semiconductor Corporation  
DS201547  
www.national.com  

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