LM1881

更新时间： 2024-01-26 13:29:33

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
18页	1117K
描述
AC Coupled Composite input Signal

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LM1881 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP, DIP8,.3	针数：	8
Reach Compliance Code：	compliant	风险等级：	5.66
商用集成电路类型：	SYNC SEPARATOR IC	JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e3	长度：	9.817 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	8	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	260	电源：	5/12 V
认证状态：	Not Qualified	座面最大高度：	5.08 mm
子类别：	Other Consumer ICs	最大压摆率：	12 mA
最大供电电压 (Vsup)：	12 V	最小供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	BIPOLAR
温度等级：	COMMERCIAL	端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	7.62 mm	Base Number Matches：	1

LM1881 数据手册

LM1881

www.ti.com

SNLS384F –FEBRUARY 1995–REVISED MARCH 2013

LM1881 Video Sync Separator

Check for Samples: LM1881

FEATURES

DESCRIPTION

The LM1881 Video sync separator extracts timing

information including composite and vertical sync,

burst/back porch timing, and odd/even field

information from standard negative going sync NTSC,

PAL ⁽¹⁾and SECAM video signals with amplitude from

0.5V to 2V p-p. The integrated circuit is also capable

of providing sync separation for non-standard, faster

horizontal rate video signals. The vertical output is

produced on the rising edge of the first serration in

the vertical sync period. A default vertical output is

produced after a time delay if the rising edge

mentioned above does not occur within the externally

set delay period, such as might be the case for a

non-standard video signal.

•

AC Coupled Composite Input Signal

>10 kΩ Input Resistance

<10 mA Power Supply Drain Current

Composite Sync and Vertical Outputs

Odd/Even Field Output

Burst Gate/Back Porch Output

Horizontal Scan Rates to 150 kHz

Edge Triggered Vertical Output

Default Triggered Vertical Output for Non-

standard Video Signal (Video Games-Home

Computers)

(1) PAL in this datasheet refers to European broadcast TV

standard “Phase Alternating Line”, and not to Programmable

Array Logic.

Connection Diagram

Figure 1. LM1881N

See Package Number D0008A or P0008E

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...18

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