LM1881
SNLS384F –FEBRUARY 1995–REVISED MARCH 2013
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APPLICATION NOTES
The LM1881 is designed to strip the synchronization signals from composite video sources that are in, or similar
to, the N.T.S.C. format. Input signals with positive polarity video (increasing signal voltage signifies increasing
scene brightness) from 0.5V (p-p) to 2V (p-p) can be accommodated. The LM1881 operates from a single supply
voltage between 5V DC and 12V DC. The only required external components besides a power supply decoupling
capacitor at pin 8 and a set current decoupling capacitor at pin 6, are the composite input coupling capacitor at
pin 2 and one resistor at pin 6 that sets internal current levels. The resistor on pin 6 (i.e. Rset) allows the LM1881
to be adjusted for source signals with line scan frequencies differing from 15.734 kHz. Four major sync signals
are available from the I/C; composite sync including both horizontal and vertical scan timing information; a
vertical sync pulse; a burst gate or back porch clamp pulse; and an odd/even output. The odd/even output level
identifies which video field of an interlaced video source is present at the input. The outputs from the LM1881
can be used to gen-lock video camera/VTR signals with graphics sources, provide identification of video fields for
memory storage, recover suppressed or contaminated sync signals, and provide timing references for the
extraction of coded or uncoded data on specific video scan lines.
To better understand the LM1881 timing information and the type of signals that are used, refer to Figure 8(a-e)
which shows a portion of the composite video signal from the end of one field through the beginning of the next
field.
COMPOSITE SYNC OUTPUT
The composite sync output, Figure 8(b), is simply a reproduction of the signal waveform below the composite
video black level, with the video completely removed. This is obtained by clamping the video signal sync tips to
1.5V DC at Pin 2 and using a comparator threshold set just above this voltage to strip the sync signal, which is
then buffered out to Pin 1. The threshold separation from the clamped sync tip is nominally 70 mV which means
that for the minimum input level of 0.5V (p-p), the clipping level is close to the halfway point on the sync pulse
amplitude (shown by the dashed line on Figure 8(a). This threshold separation is independent of the signal
amplitude, therefore, for a 2V (p-p) input the clipping level occurs at 11% of the sync pulse amplitude. The
charging current for the input coupling capacitor is 0.8 mA,
Normally the signal source for the LM1881 is assumed to be clean and relatively noise-free, but some sources
may have excessive video peaking, causing high frequency video and chroma components to extend below the
black level reference. Some video discs keep the chroma burst pulse present throughout the vertical blanking
period so that the burst actually appears on the sync tips for three line periods instead of at black level. A clean
composite sync signal can be generated from these sources by filtering the input signal. When the source
impedance is low, typically 75Ω, a 620Ω resistor in series with the source and a 510 pF capacitor to ground will
form a low pass filter with a corner frequency of 500 kHz. This bandwidth is more than sufficient to pass the sync
pulse portion of the waveform; however, any subcarrier content in the signal will be attenuated by almost 18 dB,
effectively taking it below the comparator threshold. Filtering will also help if the source is contaminated with
thermal noise. The output waveforms will become delayed from between 40 ns to as much as 200 ns due to this
filter. This much delay will not usually be significant but it does contribute to the sync delay produced by any
additional signal processing. Since the original video may also undergo processing, the need for time delay
correction will depend on the total system, not just the sync stripper.
VERTICAL SYNC OUTPUT
A vertical sync output is derived by internally integrating the composite sync waveform (Figure 9). To understand
the generation of the vertical sync pulse, refer to the lower left hand section Figure 9. Note that there are two
comparators in the section. One comparator has an internally generated voltage reference called V1 going to one
of its inputs. The other comparator has an internally generated voltage reference called V2 going to one of its
inputs. Both comparators have a common input at their noninverting input coming from the internal integrator.
The internal integrator is used for integrating the composite sync signal. This signal comes from the input side of
the composite sync buffer and are positive going sync pulses. The capacitor to the integrator is internal to the
LM1881. The capacitor charge current is set by the value of the external resistor RSET. The output of the
integrator is going to be at a low voltage during the normal horizontal lines because the integrator has a very
short time to charge the capacitor, which is during the horizontal sync period. The equalization pulses will keep
the output voltage of the integrator at about the same level, below the V1. During the vertical sync period the
narrow going positive pulses shown in Figure 8 is called the serration pulse. The wide negative portion of the
vertical sync period is called the vertical sync pulse. At the start of the vertical sync period, before the first
Serration pulse occurs, the integrator now charges the capacitor to a much higher voltage. At the first serration
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