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LC72710W PDF预览

LC72710W

更新时间: 2024-11-12 22:47:15
品牌 Logo 应用领域
三洋 - SANYO 解码器接收机
页数 文件大小 规格书
33页 165K
描述
Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder

LC72710W 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFP包装说明:LFQFP,
针数:64Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.33
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
功能数量:1端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.7 mm
最大压摆率:25 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmBase Number Matches:1

LC72710W 数据手册

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Ordering number : ENN6166  
CMOS IC  
LC72710W, 72710LW  
Mobile FM Multiplex Broadcast (DARC) Receiver IC  
with On-Chip VICS Decoder  
• 7.2 MHz crystal oscillator circuit  
• Two power saving modes: STNBY and EC_STOP  
Overview  
The LC72710W and LC72710LW are data demodulator  
ICs for receiving FM multiplex broadcasts for mobile  
reception in the DARC format. This IC includes an on-  
chip bandpass filter for extracting the DARC signal from  
the FM baseband signal. It also integrates a decoder circuit  
that performs the VICS data processing on the same chip  
and can implement a compact, multifunction VICS  
reception system. The LC72710W and LC72710LW  
support both parallel and CCB serial CPU interfaces, and  
integrate the circuits required for simultaneous reception  
of both VICS data and dGPS service data. Note that a  
contract with VICS Center is required to evaluate this  
sample IC and to produce end products that support VICS.  
• Dedicated frame synchronization circuit for  
simultaneous reception of dGPS and VICS data  
• Applications can use either a parallel CPU interface  
(DMA) or a CCB serial interface.  
• Supply voltage: 4.5 to 5.5 V (LC72710W), 2.7 to 3.6 V  
(LC72710LW)  
Package Dimensions  
unit: mm  
3190-SQFP64  
[LC72710W, 72710LW]  
12.0  
10.0  
Functions  
1.25  
0.5  
0.18  
1.25  
0.15  
• Adjustment-free 76 kHz SCF bandpass filter  
• Built-in VICS decoder  
33  
48  
49  
32  
• MSK delay detection system based on a 1T delay.  
• Error correction function based on a 2T delay (in the  
MSK detection stage)  
• Digital PLL based clock regeneration function  
• Shift-register 1T and 2T delay circuits  
• Block and frame synchronization detection circuits  
• Functions for setting the number of allowable BIC errors  
and the number of synchronization protection  
operations.  
17  
64  
1
16  
• Error correction using (272, 190) codes  
• Built-in layer 4 CRC code checking circuit  
• On-chip frame memory and memory control circuit for  
vertical correction  
0.5  
0.5  
SANYO: SQFP64  
CCB is a trademark of SANYO ELECTRIC CO., LTD.  
CCB is SANYO’s original bus format and all the bus  
addresses are controlled by SANYO.  
Any and all SANYO products described or contained herein do not have specifications that can handle  
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s  
control systems, or other applications whose failure can be reasonably expected to result in serious  
physical and/or material damage. Consult with your SANYO representative nearest you before using  
any SANYO products described or contained herein in such applications.  
SANYO assumes no responsibility for equipment failures that result from using products at values that  
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other  
parameters) listed in products specifications of any and all SANYO products described or contained  
herein.  
SANYO Electric Co.,Ltd. Semiconductor Company  
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN  
12100RM (OT) No. 6166-1/33  

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