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L6116IM25L PDF预览

L6116IM25L

更新时间： 2024-11-12 20:31:19
品牌 Logo 应用领域
逻辑 - LOGIC 静态存储器内存集成电路
页数 文件大小 规格书
8页 163K
描述
Standard SRAM, 2KX8, 25ns, CMOS, CDIP24, 0.600 INCH, CERDIP-24

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中文翻译

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L6116IM25L 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP24,.6
针数：24Reach Compliance Code：unknown
ECCN代码：3A001.A.2.CHTS代码：8542.32.00.41
风险等级：5.92最长访问时间：25 ns
其他特性：AUTOMATIC POWER-DOWNI/O 类型：COMMON
JESD-30 代码：R-GDIP-T24JESD-609代码：e0
长度：31.75 mm内存密度：16384 bit
内存集成电路类型：STANDARD SRAM内存宽度：8
湿度敏感等级：3功能数量：1
端口数量：1端子数量：24
字数：2048 words字数代码：2000
工作模式：ASYNCHRONOUS最高工作温度：125 °C
最低工作温度：-55 °C组织：2KX8
输出特性：3-STATE可输出：YES
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP24,.6封装形状：RECTANGULAR
封装形式：IN-LINE并行/串行：PARALLEL
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified座面最大高度：5.08 mm
最大待机电流：0.00005 A最小待机电流：2 V
子类别：SRAMs最大压摆率：0.115 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：15.24 mm
Base Number Matches：1

L6116IM25L 数据手册

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L6116  
2K x 8 Static RAM (Low Power)  
DEVICES INCORPORATED  
FEATURES  
DESCRIPTION  
q 2K x 8 Static RAM with Chip Select The L6116 is a high-performance, low- (typical) respectively, at 3 V, allowing  
Powerdown, Output Enable  
q Auto-Powerdown™Design  
q Advanced CMOS Technology  
q High Speed — to 15 ns maximum  
q Low Power Operation  
Active:  
power CMOS Static RAM. The  
storage circuitry is organized as 2048  
words by 8 bits per word. The 8 Data  
In and Data Out signals share I/O  
pins. These devices are available in  
three speeds with maximum access  
times from 15 ns to 25 ns.  
effective battery backup operation.  
The L6116 provides asynchronous  
(unclocked) operation with matching  
access and cycle times. An active-low  
Chip Enable and a three-state I/O bus  
with a separate Output Enable control  
simplify the connection of several  
chips for increased storage capacity.  
425 mW typical at 25 ns  
Standby (typical):  
400 µW (L6116)  
Inputs and outputs are TTL compat-  
ible. Operation is from a single +5 V  
power supply. Power consumption  
for the L6116 is 425 mW (typical) at  
25 ns. Dissipation drops to 60 mW  
(typical) for the L6116 and 50 mW  
(typical) for the L6116-L when the  
memory is deselected.  
Memory locations are specified on  
address pins A0 through A10. Reading  
from a designated location is  
200 µW (L6116-L)  
q Data Retention at 2 V for Battery  
Backup Operation  
q DESC SMD No.  
accomplished by presenting an  
address and driving CE and OE LOW,  
while WE remains HIGH. The data in  
the addressed memory location will  
then appear on the Data Out pins  
within one access time. The output  
pins stay in a high-impedance state  
when CE or OE is HIGH, or WE is  
LOW.  
5962-84036 — L6116  
5962-89690 — L6116  
5962-88740 — L6116-L  
Two standby modes are available.  
Proprietary Auto-Powerdown™  
circuitry reduces power consumption  
automatically during read or write  
accesses which are longer than the  
minimum access time or when the  
memory is deselected. In addition,  
data may be retained in inactive  
storage with a supply voltage as low  
as 2 V. The L6116 and L6116-L  
consume only 30 µW and 15 µW  
q Available 100% Screened to  
MIL-STD-883, Class B  
q Plug Compatible with IDT6116,  
Cypress CY7C128/CY6116  
q Package Styles Available:  
• 24-pin Plastic DIP  
Writing to an addressed location is  
accomplished when the active-low CE  
and WE inputs are both LOW. Either  
signal may be used to terminate the  
write operation. Data In and Data Out  
signals have the same polarity.  
• 24-pin CerDIP  
• 24-pin Plastic SOJ  
• 24-pin Ceramic Flatpack  
• 28-pin Ceramic LCC  
• 32-pin Ceramic LCC  
Latchup and static discharge pro-  
tection are provided on-chip. The  
L6116 can withstand an injection  
current of up to 200 mA on any pin  
without damage.  
L6116 BLOCK DIAGRAM  
128 x 16 x 8  
MEMORY  
ARRAY  
7
ROW  
ADDRESS  
CE  
WE  
OE  
8
COLUMN SELECT  
& COLUMN SENSE  
I/O7-0  
CONTROL  
4
COLUMN ADDRESS  
16K Static RAMs  
03/21/95–LDS.6116-F  
1
12345678

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 		Standard SRAM, 2KX8, 25ns, CMOS, CDIP24, 0.600 INCH, CERDIP-24

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