Datasheet > KM48V2100B

KM48V2100B

更新时间： 2024-11-01 22:25:11

品牌	Logo	应用领域
三星 - SAMSUNG		/
页数	文件大小	规格书
8页	82K
描述
2M x 8Bit CMOS Dynamic RAM with Fast Page Mode

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

KM48V2100B 数据手册

KM48C2000B, KM48C2100B

KM48V2000B, KM48V2100B

CMOS DRAM

2M x 8Bit CMOS Dynamic RAM with Fast Page Mode

DESCRIPTION

This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells

within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5,-6 or -7), power con-

sumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-

before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version.

This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung's advanced CMOS process to realize high band-width, low power

consumption and high reliability.

It may be used as graphic memory unit for microcomputer, personal computer and portable machines.

FEATURES

¡ Ü

Fast Page Mode operation

¡ Ü

Part Identification

¡ Ü

Byte/Word Read/Write operation

¡ Ü

CAS-before-RAS refresh capability

- KM48C2000B/B-L (5V, 4K Ref.)

¡ Ü

RAS-only and Hidden refresh capability

Self-refresh capability (L-ver only)

- KM48C2100B/B-L (5V, 2K Ref.)

- KM48V2000B/B-L (3.3V, 4K Ref.)

- KM48V2100B/B-L (3.3V, 2K Ref.)

¡ Ü

Fast parallel test mode capability

TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

Early Write or output enable controlled write

JEDEC Standard pinout

¡ Ü

Active Power Dissipation

Unit : mW

3.3V

Speed

Available in Plastic SOJ and TSOP(II) packages

¡ ¾

Single +5V 10% power supply (5V product)

-5

-6

-7

324

288

252

396

360

324

495

440

385

605

550

495

¡ ¾

Single +3.3V 0.3V power supply (3.3V product)

FUNCTIONAL BLOCK DIAGRAM

Refresh Cycles

RAS

CAS

Vcc

Vss

Part

VCC

NO.

Refresh

cycle

Refresh period

Control

Clocks

VBB Generator

Normal

L-ver

C2000B

V2000B

C2100B

V2100B

3.3V

Data in

Buffer

64ms

Row Decoder

Refresh Timer

Refresh Control

128ms

32ms

tPC

3.3V

DQ0

DQ7

Memory Array

2,097,152 x 8

Cells

Refresh Counter

Row Address Buffer

Col. Address Buffer

Performance Range

A0-A11

(A0 - A10)*1

A0 - A8

Speed

Remark

tRAC

50ns

60ns

70ns

tCAC

tRC

Data out

Buffer

-5

-6

-7

13ns

90ns

35ns 5V/3.3V

Column Decoder

(A0 - A9)*1

15ns 110ns 40ns 5V/3.3V

20ns 130ns 45ns 5V/3.3V

Note) *1 : 2K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7 8

中文翻译

下载PDF

与KM48V2100B相关器件

型号	品牌	获取价格	描述	数据表
KM48V2100BK-6	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BK-7	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 70ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BK-8	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 80ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BK-L6	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BK-L7	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 70ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BK-L8	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 80ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
KM48V2100BS-6	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
KM48V2100BS-8	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 80ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
KM48V2100BS-L5	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 50ns, CMOS, PDSO28
KM48V2100BS-L6	SAMSUNG	获取价格	Fast Page DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28

与KM48V2100B相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

6
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

3
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

24
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

25

产品中心

服务支持

精选活动

关于我们

帮助中心

KM48V2100B

KM48V2100B 数据手册

与KM48V2100B相关器件

与KM48V2100B相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

KM48V2100B

KM48V2100B 数据手册

与KM48V2100B相关器件

与KM48V2100B相关文章

您还可以找

您在本页遇到什么问题？