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KK74AC299 PDF预览

KK74AC299

更新时间: 2024-01-27 09:51:30
品牌 Logo 应用领域
可天士 - KODENSHI 移位寄存器
页数 文件大小 规格书
9页 565K
描述
8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Speed Silicon-Gate CMOS

KK74AC299 技术参数

生命周期:Obsolete包装说明:DIP, DIP20,.3
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:NJESD-30 代码:R-PDIP-T20
最大频率@ Nom-Sup:80000000 Hz位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:3.3/5 V
认证状态:Not Qualified子类别:Shift Registers
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

KK74AC299 数据手册

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TECHNICAL DATA  
KK74AC299  
8-Bit Bidirectional Universal  
Shift Register with Parallel I/O  
High-Speed Silicon-Gate CMOS  
The KK74AC299 is identical in pinout to the LS/ALS299,  
HC/HCT299. The device inputs are compatible with standard CMOS  
outputs; with pullup resistors, they are compatible with LS/ALS outputs.  
The KK74AC299 features a multiplexed parallel input/output data port  
to achieve full 8-bit handling in a 20 pin package. Due to the large output  
drive capability and the 3-state feature, this device is ideally suited for  
interface with bus lines in a bus-oriented system.  
Two Mode-Select inputs and two Output Enable inputs are used to  
choose the mode of operation as listed in the Function Table.  
Synchronous parallel loading is accomplished by taking both Mode-  
Select lines, S1 and S2, high. This places the outputs in the high-  
impedance state, which permits data applied to the data port to be clocked  
into the register. Reading out of the register can be accomplished when  
the outputs are enabled. The active-low asynchronous Reset overrides all  
other inputs.  
ORDERING INFORMATION  
KK74AC299N Plastic  
KK74AC299DW SOIC  
TA = -40° to 85° C for all packages  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1.0 µA; 0.1 µA @ 25°C  
High Noise Immunity Characteristic of CMOS Devices  
Outputs Source/Sink 24 mA  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
PIN 20=VCC  
PIN 10 = GND  
1

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