OneNAND512Mb(KFG1216U2B-xIB6)
FLASH MEMORY
Revision History
Document Title
OneNAND
Revision History
Revision No. History
Draft Date
Remark
0.0
1. Initial issue.
Aug. 29, 2006
Advanced
1.0
1. Corrected errata
Jan. 15, 2007
Final
2. Deleted Sync Burst Write, Cache Read, Sync Burst Block Read and
83Mhz option.
3. Added package size of 7mm x 9mm (67ball)
4. Chapter 2.8.19 : revised description of RDY configuration.
5. Chapter 3.1 : added comments on Note 4)
6. Chapter 3.3 : revised Start Block Address value at Hot reset into N/A.
7. Chapter 3.4.4 & 3.83.8 & 3.9 & 3.10.1 & 3.10.3 : revised flow charts of
’Data protection operation’ & ’All block unlock operation’ & ’Program oper-
ation’ & ’Copy-back program operation’ & ’Block erase operation’ & ’Multi-
block erase verify read’.
8. Chapter 3.5 & 6.17 : corrected data protection explanation during power-
down.
9. Chapter 3.9 : corrected start address restriction of DataRAMs.
10. Chapter 3.9.1 : deleted data sequence table.
11. Chapter 6.11 & 6.12 : revised timing diagram.
12. Chapter 7.1 & 7.1.2 : added the case table of INT type and comment
regarding INT pin connection when unused.
1.1
1. Corrected errata.
Aug. 17, 2007
Final
2. Chapter 1.4 Product Features revised(@3.3V deleted).
3. Chapter 2.8.21 Controller Status Register Output Modes revised.
4. Chapter 2.8.23 Start Block Address Register revised.
5. Chapter 3.3 Reset Mode Operation revised.
6. Chapter 3.3.1 Cold Reset Mode Operation revised.
7. Chapter 3.4.4 Data Protection Operation Flow Diagram and All Block
Unlock Flow Diagram revised.
8. Chapter 3.5 Data Protection During Power Down Operation revised.
9. Chapter 3.9.1 Copy-Back Program Operation with Random Data Input
revised.
10. Chapter 3.10.2 Multi-Block Erase Operation revised.
11. Chapter 5.4 AC Characteristics for Synchronous Burst Read revised.
12. Chapter 5.8 AC Characteristics for Load/Program/Erase Performance
revised.
13. Chapter 6.13 Cold Reset Timing revised.
14. Chapter 7.1.2 Polling the Interrupt Register Status Bit revised.
1.2
1.3
1. Chapter4.3 DC Characteristics revised.
Aug. 27, 2007
Sep. 06, 2007
Final
Final
1. Chapter 5.8 AC Characteristics for Load/Program/Erase Performance
revised.
1.4
1. Chapter 5.7 AC Characteristics for Asynchronous Write tCH revised.
2. Chapter 5.9 AC Characteristics for Load/Program/Erase Performance
tINTW removed.
Jun. 11, 2008
Final
3. Chapter 6.11 Program Operation Timing tINTW removed.
4. Chapter 6.12 Block Erase Operation Timing tINTW removed.
2