Datasheet > K6R1016V1B-JP12

K6R1016V1B-JP12

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		静态存储器光电二极管
页数	文件大小	规格书
9页	207K
描述
Standard SRAM, 64KX16, 12ns, CMOS, PDSO44, PLASTIC, SOJ-44

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数据手册

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K6R1016V1B-JP12 数据手册

PRELIMINARY

Preliminary

PRELIMINARY

CMOS SRAM

K6R1016V1B-C/B-L, K6R1016V1B-I/B-P

AC CHARACTERISTICS(TA=0 to 70°C, VCC=3.3±0.3V, unless otherwise noted.)

TEST CONDITIONS*

Parameter

Value

0V to 3V

3ns

Input Pulse Levels

Input Rise and Fall Times

Input and Output timing Reference Levels

Output Loads

1.5V

See below

* The above test conditions are also applied at industrial temperature range.

Output Loads(A)

Output Loads(B)

for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ

+3.3V

RL = 50W

DOUT

319W

VL = 1.5V

DOUT

30pF*

ZO = 50W

353W

5pF*

* Capacitive Load consists of all components of the

test environment.

* Including Scope and Jig Capacitance

READ CYCLE*

K6R1016V1B-8

K6R1016V1B-10

K6R1016V1B-12

Sym-

Parameter

bol

Unit

Min

Max

Min

Max

Min

Max

Read Cycle Time

tRC

tAA

Address Access Time

Chip Select to Output

tCO

tOE

tBA

Output Enable to Valid Output

UB, LB Access Time

Chip Enable to Low-Z Output

Output Enable to Low-Z Output

UB, LB Enable to Low-Z Output

Chip Disable to High-Z Output

Output Disable to High-Z Output

UB, LB Disable to High-Z Output

Output Hold from Address Change

tLZ

tOLZ

tBLZ

tHZ

tOHZ

tBHZ

tOH

* The above parameters are also guaranteed at industrial temperature range.

Rev 2.1

August 1998

- 4 -

1 2 345 6 7...9

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