Datasheet > K4S561633F-XC1L

K4S561633F-XC1L

更新时间： 2024-02-23 01:13:38

品牌	Logo	应用领域
三星 - SAMSUNG		时钟动态存储器内存集成电路
页数	文件大小	规格书
12页	114K
描述
Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54

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技术参数
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K4S561633F-XC1L 技术参数

是否Rohs认证：	不符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.83
最长访问时间：	7 ns	最大时钟频率 (fCLK)：	105 MHz
I/O 类型：	COMMON	交错的突发长度：	1,2,4,8
JESD-30 代码：	S-PBGA-B54	JESD-609代码：	e0
内存密度：	268435456 bit	内存集成电路类型：	SYNCHRONOUS DRAM
内存宽度：	16	端子数量：	54
字数：	16777216 words	字数代码：	16000000
最高工作温度：	70 °C	最低工作温度：	-25 °C
组织：	16MX16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	FBGA
封装等效代码：	BGA54,9X9,32	封装形状：	SQUARE
封装形式：	GRID ARRAY, FINE PITCH	电源：	3/3.3 V
认证状态：	Not Qualified	刷新周期：	8192
连续突发长度：	1,2,4,8,FP	最大待机电流：	0.0005 A
子类别：	DRAMs	最大压摆率：	0.165 mA
表面贴装：	YES	技术：	CMOS
温度等级：	OTHER	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	Base Number Matches：	1

K4S561633F-XC1L 数据手册

K4S561633F - X(Z)E/N/G/C/L/F

Mobile-SDRAM

4M x 16Bit x 4 Banks Mobile SDRAM in 54BOC

FEATURES

GENERAL DESCRIPTION

• 3.0V & 3.3V power supply.

The K4S561633F is 268,435,456 bits synchronous high data

rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits,

fabricated with SAMSUNG's high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst length and programmable latencies allow the same device

to be useful for a variety of high bandwidth, high performance

memory system applications.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

clock

• Burst read single-bit write operation.

• Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

• DQM for masking.

• Auto refresh.

• 64ms refresh period (8K cycle).

• Commercial Temperature Operation (-25°C ~ 70°C).

• Extended Temperature Operation (-25°C ~ 85°C).

• 54Balls BOC with 0.8mm ball pitch

( -X : Leaded, -Z : Lead Free).

ORDERING INFORMATION

Part No.

Max Freq.

Interface

Package

K4S561633F-X(Z)E/N/G/C/L/F75

K4S561633F-X(Z)E/N/G/C/L/F1H

K4S561633F-X(Z)E/N/G/C/L/F1L

133MHz(CL=3)

105MHz(CL=2)

54 BOC

Leaded (Lead Free)

LVCMOS

105MHz(CL=3)^*1

- X(Z)E/N/G : Normal / Low / Low Power, Extended Temperature(-25°C ~ 85°C)

- X(Z)C/L/F : Normal / Low / Low Power, Commercial Temperature(-25°C ~ 70°C)

NOTES :

1. In case of 40MHz Frequency, CL1 can be supported.

2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.

Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific

purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.

February 2004

12 3 4 5 6 7...12

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与K4S561633F-XC1L相关器件

型号	品牌	描述	获取价格	数据表
K4S561633F-XE	SAMSUNG	4M x 16Bit x 4 Banks Mobile SDRAM in 54BOC	获取价格
K4S561633F-XE1H	SAMSUNG	Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54	获取价格
K4S561633F-XE75	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54	获取价格
K4S561633F-XE750	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 0.80 MM PITCH, BOC-54	获取价格
K4S561633F-XF1H0	SAMSUNG	Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54, 0.80 MM PITCH, BOC-54	获取价格
K4S561633F-XF75	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54	获取价格

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