Datasheet > K4S561632C-TN60

K4S561632C-TN60

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
11页	114K
描述
Synchronous DRAM, 16MX16, 5ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

K4S561632C-TN60 数据手册

K4S561632C

CMOS SDRAM

4M x 16Bit x 4 Banks Synchronous DRAM

FEATURES

GENERAL DESCRIPTION

• JEDEC standard 3.3V power supply

• LVTTL compatible with multiplexed address

• Four banks operation

The K4S561632C is 268,435,456 bits synchronous high data rate

Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabri-

cated with SAMSUNG's high performance CMOS technology. Syn-

chronous design allows precise cycle control with the use of

system clock I/O transactions are possible on every clock cycle.

Range of operating frequencies, programmable burst length and

programmable latencies allow the same device to be useful for a

variety of high bandwidth, high performance memory system appli-

cations.

• MRS cycle with address key programs

-. CAS latency (2 & 3)

-. Burst length (1, 2, 4, 8 & Full page)

-. Burst type (Sequential & Interleave)

• All inputs are sampled at the positive going edge of the system

clock.

• Burst read single-bit write operation

• DQM for masking

ORDERING INFORMATION

Part No.

Max Freq.

Interface Package

• Auto & self refresh

K4S561632C-TE/N60

K4S561632C-TE/N7C

K4S561632C-TE/N75

K4S561632C-TE/N1H

K4S561632C-TE/N1L

166MHz(CL=3)

133MHz(CL=2)

133MHz(CL=3)

100MHz(CL=2)

100MHz(CL=3)

• 64ms refresh period (8K Cycle)

54pin

LVTTL

TSOP(II)

*E/N : Extended Temperature (-25 to 85 °C)

FUNCTIONAL BLOCK DIAGRAM

LWE

Data Input Register

LDQM

Bank Select

4M x 16

DQi

CLK

ADD

Column Decoder

Latency & Burst Length

LCKE

Programming Register

LWCBR

LRAS

LCBR

LWE

LCAS

LDQM

Timing Register

CLK

CKE

RAS

CAS

L(U)DQM

* Samsung Electronics reserves the right to change products or specification without notice.

Rev.0.1 Sept.2001

1 234 5 6 7...11

下载PDF

与K4S561632C-TN60相关器件

型号	品牌	描述	获取价格	数据表
K4S561632C-TN75	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54	获取价格
K4S561632C-TN7C	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54	获取价格
K4S561632C-TP75	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54	获取价格
K4S561632C-TP7C	SAMSUNG	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54	获取价格
K4S561632D	SAMSUNG	256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL	获取价格
K4S561632D-NC1H	SAMSUNG	Synchronous DRAM, 16MX16, 6ns, CMOS, PDSO54, 0.300 X 0.551 INCH, 0.50 MM PITCH, STSOP2-54	获取价格