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K4Q153212M-JL PDF预览

K4Q153212M-JL

更新时间: 2024-11-23 20:00:19
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器
页数 文件大小 规格书
21页 325K
描述
DRAM

K4Q153212M-JL 技术参数

生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.84Base Number Matches:1

K4Q153212M-JL 数据手册

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K4Q153211M, K4Q153212M  
CMOS DRAM  
512K x 32Bit CMOS Quad CAS DRAM with EDO  
DESCRIPTION  
This is a 524,288 x 32 bit Extended Data Out CMOS DRAM. Extended Data Out Mode offers high speed random access of memory cells  
within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle 1K, access time (-50 or -60),  
power consumption(Normal or Low power) and SOJ package type are optional features of this family. All of this family have CAS-before-  
RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This  
512Kx32 EDO Mode Quad CAS DRAM is fabricated using Samsung's advanced CMOS process to realize high band-width, low power  
consumption and high reliability.  
FEATURES  
Part Identification  
• Extended Data Out Mode operation  
(Fast Page Mode with Extended Data Out)  
• Four separate CAS pins provide for separate I/O operation  
• CAS-before-RAS refresh capability  
- K4Q153211M-JC (5.0V, 1K Ref.)  
- K4Q153211M-JL (5.0V, 1K Ref. LP)  
- K4Q153212M-JC (3.3V, 1K Ref.)  
- K4Q153212M-JL (3.3V, 1K Ref. LP)  
• RAS-only and Hidden refresh capability  
• Self-refresh capability (L-ver only)  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
ActivePowerDissipation  
Unit : mW  
5.0V  
• Plastic SOJ 400mil x 1125mil package  
• Single +5.0V±0.5V power supply(5V product)  
• Single +3.3V±0.3V power supply(3.3V product)  
Speed  
-50  
3.3V  
-
880  
825  
-60  
540  
FUNCTIONAL BLOCK DIAGRAM  
Refresh Cycles  
RAS  
CAS0-3  
W
Part  
NO.  
Refresh  
cycle  
Refresh period  
CAS0  
Control  
Clocks  
DQ0  
to  
VCC  
D/I Buffer  
Vcc  
Vss  
VBB Generator  
Normal  
16ms  
L-ver  
128ms  
128ms  
DQ7  
CAS0  
D/O Buffer  
153211M-J 5.0V  
153212M-J 3.3V  
1K  
1K  
CAS1  
16ms  
DQ8  
to  
DQ15  
D/I Buffer  
Refresh Timer  
Row Decoder  
CAS1  
D/O Buffer  
Refresh Control  
Refresh Counter  
OE  
CAS2  
DQ16  
to  
DQ23  
Memory  
Array  
524,288 x 32  
Cells  
D/I Buffer  
Performance Range  
CAS2  
D/O Buffer  
Speed  
Remark  
Row Address Buffer  
Col. Address Buffer  
tRAC  
50ns  
60ns  
tCAC  
tRC  
tHPC  
A0 - A9  
A0 - A8  
CAS3  
DQ24  
to  
DQ31  
-50  
-60  
15ns  
84ns  
20ns 5.0V only  
D/I Buffer  
Column Decoder  
17ns 104ns 27ns 5V/3.3V  
CAS3  
D/O Buffer  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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