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K4F660411D-JC500 PDF预览

K4F660411D-JC500

更新时间: 2024-11-11 14:16:59
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
20页 367K
描述
Fast Page DRAM, 16MX4, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

K4F660411D-JC500 技术参数

生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.84
访问模式:FAST PAGE最长访问时间:50 ns
其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESHJESD-30 代码:R-PDSO-J32
长度:20.96 mm内存密度:67108864 bit
内存集成电路类型:FAST PAGE DRAM内存宽度:4
功能数量:1端口数量:1
端子数量:32字数:16777216 words
字数代码:16000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16MX4封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
座面最大高度:3.76 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

K4F660411D-JC500 数据手册

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K4F660411D,K4F640411D  
CMOS DRAM  
16M x 4bit CMOS Dynamic RAM with Fast Page Mode  
DESCRIPTION  
This is a family of 16,777,216 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory  
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time(-50 or -60), package type(SOJ or TSOP-II) are optional fea-  
tures of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 16Mx4 Fast  
Page Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power consumption  
and high reliability.  
FEATURES  
• Fast Page Mode operation  
• Part Identification  
- K4F660411D-JC(5.0V, 8K Ref.)  
- K4F640411D-JC(5.0V, 4K Ref.)  
- K4F660411D-TC(5.0V, 8K Ref.)  
- K4F640411D-TC(5.0V, 4K Ref.)  
• CAS-before-RAS refresh capability  
• RAS-only and Hidden refresh capability  
• Fast parallel test mode capability  
• TTL(5.0V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
Active Power Dissipation  
• Available in Plastic SOJ and TSOP(II) packages  
• +5.0V±10% power supply  
Unit : mW  
Speed  
-50  
8K  
4K  
660  
605  
495  
440  
-60  
Refresh Cycles  
Part  
NO.  
Refresh  
cycle  
Refresh time  
FUNCTIONAL BLOCK DIAGRAM  
Normal  
64ms  
K4F660411D*  
K4F640411D  
8K  
4K  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
VBB Generator  
* Access mode & RAS only refresh mode  
: 8K cycle/64ms  
CAS-before-RAS & Hidden refresh mode  
: 4K cycle/64ms  
Row Decoder  
Refresh Timer  
Refresh Control  
Data in  
Buffer  
Memory Array  
16,777,216 x 4  
Cells  
DQ0  
to  
DQ3  
Refresh Counter  
Row Address Buffer  
Col. Address Buffer  
Performance Range  
Speed  
Data out  
Buffer  
tRAC  
50ns  
60ns  
tCAC  
13ns  
15ns  
tRC  
tPC  
A0~A12  
(A0~A11)*1  
OE  
-50  
-60  
90ns  
110ns  
35ns  
40ns  
A0~A10  
(A0~A11)*1  
Column Decoder  
Note) *1 : 4K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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