Datasheet > K4E660811D-JC500

K4E660811D-JC500

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
21页	413K
描述
EDO DRAM, 8MX8, 50ns, CMOS, PDSO32, SOJ-32

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K4E660811D-JC500 数据手册

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K4E660811D,K4E640811D

TEST MODE CYCLE

Parameter

CMOS DRAM

( Note 11 )

-50

-60

Symbol

Units

Note

Min

Max

Min

109

145

Max

Random read or write cycle time

Read-modify-write cycle time

Access time from RAS

tRC

121

tRWC

tRAC

tCAC

tAA

3,4,10,12

3,4,5,12

3,10,12

Access time from CAS

Access time from column address

RAS pulse width

10K

tRAS

tCAS

tRSH

tCSH

tRAL

CAS pulse width

RAS hold time

CAS hold time

Column Address to RAS lead time

CAS to W delay time

tCWD

tRWD

tAWD

tHPC

tHPRWC

tRASP

tCPA

tOEA

tOED

tOEH

RAS to W delay time

Column Address to W delay time

Hyper Page cycle time

Hyper Page read-modify-write cycle time

RAS pulse width (Hyper page cycle)

Access time from CAS precharge

OE access time

200K

OE to data delay

OE command hold time

1...4 5 678 9 10...21

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