Datasheet > K4E170812D

K4E170812D

更新时间： 2024-11-19 22:32:35

品牌	Logo	应用领域
三星 - SAMSUNG		存储
页数	文件大小	规格书
21页	257K
描述
2M x 8Bit CMOS Dynamic RAM with Extended Data Out

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中文翻译

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K4E170812D 数据手册

K4E170811D, K4E160811D

K4E170812D, K4E160812D

CMOS DRAM

2M x 8Bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 2,097,152 x 8 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of

memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K

Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of

this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh

operation is available in L-version. This 2Mx8 EDO Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to real-

ize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer and personal

computer.

FEATURES

• Part Identification

• Extended Data Out Mode operation

(Fast page mode with Extended Data Out)

• CAS-before-RAS refresh capability

- K4E170811D-B(F) (5V, 4K Ref.)

• RAS-only and Hidden refresh capability

- K4E160811D-B(F) (5V, 2K Ref.)

• Self-refresh capability (L-ver only)

- K4E170812D-B(F) (3.3V, 4K Ref.)

- K4E160812D-B(F) (3.3V, 2K Ref.)

• Fast parallel test mode capability

• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• Active Power Dissipation

Unit : mW

3.3V

Speed

• Available in Plastic SOJ and TSOP(II) packages

• Single +5V±10% power supply (5V product)

• Single +3.3V±0.3V power supply (3.3V product)

396

360

-50

-60

324

288

495

440

605

550

FUNCTIONAL BLOCK DIAGRAM

• Refresh Cycles

Part

Refresh

cycle

Refresh period

VCC

RAS

CAS

Vcc

Vss

NO.

Control

Clocks

Normal

L-ver

VBB Generator

K4E170811D

64ms

K4E170812D 3.3V

K4E160811D 5V

Data in

Buffer

128ms

Row Decoder

Refresh Timer

Refresh Control

Refresh Counter

32ms

K4E160812D 3.3V

DQ0

DQ7

Memory Array

2,097,152 x8

Cells

• Performance Range

A0-A11

(A0 - A10)*1

A0 - A8

Row Address Buffer

Col. Address Buffer

Speed

-50

Remark

tRAC

50ns

60ns

tCAC

tRC

tHPC

Data out

Buffer

13ns

84ns

20ns 5V/3.3V

Column Decoder

(A0 - A9)*1

-60

15ns 104ns 25ns 5V/3.3V

Note) *1 : 2K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...21

中文翻译

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与K4E170812D相关器件

型号	品牌	获取价格	描述	数据表
K4E170812D-B	SAMSUNG	获取价格	DRAM
K4E170812D-BC60	SAMSUNG	获取价格	EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
K4E170812D-BC600	SAMSUNG	获取价格	EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
K4E170812D-BL50	SAMSUNG	获取价格	EDO DRAM, 2MX8, 50ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
K4E170812D-BL60	SAMSUNG	获取价格	EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
K4E170812D-F	SAMSUNG	获取价格	DRAM
K4E170812D-FC500	SAMSUNG	获取价格	EDO DRAM, 2MX8, 50ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
K4E170812D-FL500	SAMSUNG	获取价格	EDO DRAM, 2MX8, 50ns, CMOS, PDSO28, 0.300 INCH, TSOP2-28
K4E170812D-FL60	SAMSUNG	获取价格	EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, TSOP2-28
K4E171611C-J5000	SAMSUNG	获取价格	EDO DRAM, 1MX16, 50ns, CMOS, PDSO42, SOJ-42

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