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K4E170812C-FC600 PDF预览

K4E170812C-FC600

更新时间: 2024-11-20 15:35:59
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
21页 257K
描述
EDO DRAM, 2MX8, 60ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, TSOP2-28

K4E170812C-FC600 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP2,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.84
访问模式:FAST PAGE WITH EDO最长访问时间:60 ns
其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESHJESD-30 代码:R-PDSO-G28
长度:18.41 mm内存密度:16777216 bit
内存集成电路类型:EDO DRAM内存宽度:8
功能数量:1端口数量:1
端子数量:28字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2MX8封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

K4E170812C-FC600 数据手册

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K4E170811C, K4E160811C  
K4E170812C, K4E160812C  
CMOS DRAM  
2M x 8Bit CMOS Dynamic RAM with Extended Data Out  
DESCRIPTION  
This is a family of 2,097,152 x 8 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of  
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K  
Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of  
this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh  
operation is available in L-version. This 2Mx8 EDO Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to real-  
ize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer and personal  
computer.  
FEATURES  
Part Identification  
• Extended Data Out Mode operation  
(Fast page mode with Extended Data Out)  
• CAS-before-RAS refresh capability  
- K4E170811C-B(F) (5V, 4K Ref.)  
• RAS-only and Hidden refresh capability  
- K4E160811C-B(F) (5V, 2K Ref.)  
• Self-refresh capability (L-ver only)  
- K4E170812C-B(F) (3.3V, 4K Ref.)  
- K4E160812C-B(F) (3.3V, 2K Ref.)  
• Fast parallel test mode capability  
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
Active Power Dissipation  
Unit : mW  
5V  
3.3V  
• Available in Plastic SOJ and TSOP(II) packages  
• Single +5V±10% power supply (5V product)  
• Single +3.3V±0.3V power supply (3.3V product)  
Speed  
4K  
2K  
396  
360  
4K  
2K  
-50  
-60  
324  
288  
495  
440  
605  
550  
FUNCTIONAL BLOCK DIAGRAM  
Refresh Cycles  
Part  
Refresh  
cycle  
Refresh period  
VCC  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
NO.  
Normal  
L-ver  
VBB Generator  
K4E170811C  
5V  
4K  
2K  
64ms  
Data in  
K4E170812C 3.3V  
K4E160811C 5V  
128ms  
Buffer  
Row Decoder  
Refresh Timer  
Refresh Control  
Refresh Counter  
32ms  
K4E160812C 3.3V  
DQ0  
to  
DQ7  
Memory Array  
2,097,152 x8  
Cells  
Performance Range  
A0-A11  
(A0 - A10)*1  
A0 - A8  
Row Address Buffer  
Col. Address Buffer  
Speed  
-50  
Remark  
tRAC  
50ns  
60ns  
tCAC  
tRC  
tHPC  
Data out  
Buffer  
13ns  
84ns  
20ns 5V/3.3V  
Column Decoder  
OE  
(A0 - A9)*1  
-60  
15ns 104ns 25ns 5V/3.3V  
Note) *1 : 2K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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