Datasheet > K4B4G1646B-HPK0

K4B4G1646B-HPK0

更新时间： 2025-11-04 00:53:35

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器双倍数据速率
页数	文件大小	规格书
64页	1002K
描述
4Gb B-die DDR3 SDRAM Olny x16

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K4B4G1646B-HPK0 数据手册

Rev. 1.0

K4B4G1646B

datasheet

DDR3 SDRAM

8.4 Differential Input Cross Point Voltage

To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each cross point voltage of differential input

signals (CK, CK and DQS, DQS) must meet the requirements in below table. The differential input cross point voltage V_IXis measured from the actual

cross point of true and complement signal to the mid level between of V_DDand V_SS

V_DD

CK, DQS

V_IX

V_DD/2

V_IX

CK, DQS

V_SS

V_SEH

V_SEL

Figure 4. VIX Definition

[ Table 12 ] Cross point voltage for differential input signals (CK, DQS)

DDR3-800/1066/1333/1600/1866/2133

Symbol

Parameter

Unit

NOTE

Min

-150

-175

-150

Max

150

175

150

V_IX

Differential Input Cross Point Voltage relative to V_DD/2 for CK,CK

Differential Input Cross Point Voltage relative to V_DD/2 for DQS,DQS

NOTE :

1. Extended range for V is only allowed for clock and if single-ended clock input signals CKand CK are monotonic, have a single-ended swing V

/ V

of at least V /2

SEL

SEH

±250 mV, and the differential slew rate of CK-CK is larger than 3 V/ ns. Refer to Table 11 on page 15 for V

and V

standard values.

SEL

SEH

2. The relation between V Min/Max and V

should satisfy following.

SEL SEH

(V /2) + V (Min) - V ≥ 25mV

SEL

- ((V /2) + V (Max)) ≥ 25mV

SEH

DD IX

8.5 Slew rate definition for Differential Input Signals

See 14.3 “Address/Command Setup, Hold and Derating :” on page 48 for single-ended slew rate definitions for address and command signals.

See 14.4 “Data Setup, Hold and Slew Rate Derating :” on page 54 for single-ended slew rate definitions for data signals.

8.6 Slew rate definitions for Differential Input Signals

Input slew rate for differential signals (CK, CK and DQS, DQS) are defined and measured as shown in Table 13 and Figure 5.

[ Table 13 ] Differential input slew rate definition

Measured

Description

Defined by

From

V_IHdiffmin- V_ILdiffmax

Delta TRdiff

V_ILdiffmax

V_IHdiffmin

Differential input slew rate for rising edge (CK-CK and DQS-DQS)

V_IHdiffmin- V_ILdiffmax

Delta TFdiff

V_IHdiffmin

V_ILdiffmax

Differential input slew rate for falling edge (CK-CK and DQS-DQS)

NOTE :

The differential signal (i.e. CK - CK and DQS - DQS) must be linear between these thresholds.

IHdiffmin

ILdiffmax

delta TFdiff

delta TRdiff

Figure 5. Differential Input Slew Rate definition for DQS, DQS, and CK, CK

- 15 -

1...12 13 141516 17 18...64

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K4B4G1646Q	SAMSUNG	获取价格	4Gb Q-die DDR3L SDRAM Olny x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant) 1.35V
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