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K3N7C4000C-DC15 PDF预览

K3N7C4000C-DC15

更新时间: 2024-11-21 20:45:59
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
3页 44K
描述
MASK ROM, 4MX16, 150ns, CMOS, PDIP42, 0.600 INCH, DIP-42

K3N7C4000C-DC15 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP42,.6
针数:42Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:150 ns
JESD-30 代码:R-PDIP-T42JESD-609代码:e0
长度:52.42 mm内存密度:67108864 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:42
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP42,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:5.08 mm
最大待机电流:0.07 A子类别:MASK ROMs
最大压摆率:0.07 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

K3N7C4000C-DC15 数据手册

 浏览型号K3N7C4000C-DC15的Datasheet PDF文件第2页浏览型号K3N7C4000C-DC15的Datasheet PDF文件第3页 
K3N7C4000C-DC  
CMOS MASK ROM  
64M-Bit (4Mx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· 4,194,304 x 16 bit organization  
· Fast access time :  
100ns(Max.) : CL=50pF  
120ns(Max.) : CL=100pF  
· Supply voltage : single +5V  
· Current consumption  
Operating : 70mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
The K3N7C4000C-DC is a fully static mask programmable  
ROM organized 4,194,304 x 16 bit. It is fabricated using sili-  
con-gate CMOS process technology.  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor and  
data memory, character generator.  
The K3N7C4000C-DC is packaged in a 42-DIP.  
· Package  
-. K3N7C4000C-DC : 42-DIP-600  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
X
A21  
A18  
1
2
42  
41  
40  
A19  
A8  
MEMORY CELL  
MATRIX  
(4,194,304x16)  
BUFFERS  
AND  
DECODER  
.
.
.
.
.
.
.
.
A17  
A7  
3
A9  
A6  
A5  
A4  
A3  
4
39 A10  
38 A11  
5
6
A12  
37  
36  
35  
34  
33  
Y
SENSE AMP.  
BUFFERS  
7
A13  
A14  
A15  
BUFFERS  
AND  
DECODER  
A2  
A1  
8
A0  
9
A0  
10  
11  
12  
A16  
DIP  
A21  
VSS  
32 A20  
.
. .  
VSS  
Q15  
Q7  
31  
30  
29  
28  
27  
13  
14  
15  
16  
17  
18  
19  
20  
OE  
Q0  
Q0  
Q15  
CONTROL  
LOGIC  
OE  
Q8  
Q1  
Q9  
Q14  
Q6  
26 Q13  
Q2  
Q10  
Q3  
Q5  
25  
24  
23  
Q12  
Q4  
Pin Name  
A0 - A21  
Q0 - Q15  
OE  
Pin Function  
Address Inputs  
Q11  
21  
22 VCC  
Data Outputs  
Output Enable  
Power (+5V)  
Ground  
K3N7C4000C-DC  
VCC  
VSS  

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