Datasheet > K20P121M100SF2

K20P121M100SF2

更新时间： 2024-11-20 11:29:11

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
页数	文件大小	规格书
68页	1819K
描述
Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

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K20P121M100SF2 数据手册

Document Number: K20P121M100SF2

Rev. 4, 3/2011

Freescale Semiconductor

Data Sheet: Product Preview

K20P121M100SF2

K20 Sub-Family Data Sheet

Supports the following:

MK20X256VMC100,

MK20N512VMC100

Features

Human-machine interface

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

•

Operating Characteristics

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 105°C

•

Analog modules

– Two 16-bit SAR ADCs

– Programmable gain amplifier (up to x64) integrated

into each ADC

– 12-bit DAC

– Three analog comparators (CMP) containing a 6-bit

DAC and programmable reference input

– Voltage reference

Performance

– Up to 100 MHz ARM Cortex-M4 core with DSP

instructions delivering 1.25 Dhrystone MIPS per

MHz

Memories and memory interfaces

– Up to 512 KB program flash memory on non-

FlexMemory devices

Timers

•

– Up to 256 KB program flash memory on

FlexMemory devices

– Up to 256 KB FlexNVM on FlexMemory devices

– 4 KB FlexRAM on FlexMemory devices

– Up to 128 KB RAM

– Programmable delay block

– Eight-channel motor control/general purpose/PWM

timer

– Two 2-channel quadrature decoder/general purpose

timers

– Serial programming interface (EzPort)

– FlexBus external bus interface

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

Clocks

•

– 3 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

Communication interfaces

– USB full-/low-speed On-the-Go controller with on-

chip transceiver

– Two Controller Area Network (CAN) modules

– Three SPI modules

– Two I2C modules

– Six UART modules

– Secure Digital host controller (SDHC)

– I2S module

•

System peripherals

– 10 low-power modes to provide power optimization

based on application requirements

– Memory protection unit with multi-master

protection

– 16-channel DMA controller, supporting up to 64

request sources

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

Security and integrity modules

•

– Hardware CRC module to support fast cyclic

redundancy checks

– 128-bit unique identification (ID) number per chip

This document contains information on a product under development. Freescale

reserves the right to change or discontinue this product without notice.

Preliminary

12 3 4 5 6 7...68

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与K20P121M100SF2相关器件

型号	品牌	获取价格	描述	数据表
K20P121M100SF2V2	FREESCALE	获取价格	K20 Sub-Family
K20P144M100SF2	FREESCALE	获取价格	K20 Sub-Family Data Sheet
K20P144M100SF2_11	FREESCALE	获取价格	Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per
K20P144M100SF2_1109	FREESCALE	获取价格	K20 Sub-Family Data Sheet
K20P144M100SF2V2	FREESCALE	获取价格	K20 Sub-Family
K20P144M120SF3	FREESCALE	获取价格	K20 Sub-Family Data Sheet
K20P144M120SF3_1210	FREESCALE	获取价格	K20 Sub-Family
K20P32M50SF0	FREESCALE	获取价格	K20 Sub-Family
K20P48M50SF0	FREESCALE	获取价格	K20 Sub-Family
K20P64M50SF0	FREESCALE	获取价格	K20 Sub-Family

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