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K20P144M120SF3 PDF预览

K20P144M120SF3

更新时间: 2024-11-18 11:44:55
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飞思卡尔 - FREESCALE /
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80页 1196K
描述
K20 Sub-Family Data Sheet

K20P144M120SF3 数据手册

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Document Number: K20P144M120SF3  
Rev. 3, 2/2012  
Freescale Semiconductor  
Data Sheet: Advance Information  
K20P144M120SF3  
K20 Sub-Family Data Sheet  
Supports the following:  
MK20FX512VLQ12,  
MK20FN1M0VLQ12,  
MK20FX512VMD12,  
MK20FN1M0VMD12  
Features  
Security and integrity modules  
– Hardware CRC module to support fast cyclic  
redundancy checks  
Operating Characteristics  
– Voltage range: 1.71 to 3.6 V  
– Flash write voltage range: 1.71 to 3.6 V  
– Temperature range (ambient): -40 to 105°C  
– 128-bit unique identification (ID) number per chip  
Human-machine interface  
– Low-power hardware touch sensor interface (TSI)  
– General-purpose input/output  
Performance  
– Up to 120 MHz ARM Cortex-M4 core with DSP  
instructions delivering 1.25 Dhrystone MIPS per  
MHz  
Analog modules  
– Four 16-bit SAR ADCs  
– Programmable gain amplifier (PGA) (up to x64)  
integrated into each ADC  
– Two 12-bit DACs  
Memories and memory interfaces  
– Up to 1024 KB program flash memory on non-  
FlexMemory devices  
– Up to 512 KB program flash memory on  
FlexMemory devices  
– Up to 512 KB FlexNVM on FlexMemory devices  
– 16 KB FlexRAM on FlexMemory devices  
– Up to 128 KB RAM  
– Four analog comparators (CMP) containing a 6-bit  
DAC and programmable reference input  
– Voltage reference  
Timers  
– Programmable delay block  
– Two 8-channel motor control/general purpose/PWM  
timers  
– Two 2-channel quadrature decoder/general purpose  
timers  
– Serial programming interface (EzPort)  
– FlexBus external bus interface  
– NAND flash controller interface  
Clocks  
– 3 to 32 MHz crystal oscillator  
– 32 kHz crystal oscillator  
– Multi-purpose clock generator  
– Periodic interrupt timers  
– 16-bit low-power timer  
– Carrier modulator transmitter  
– Real-time clock  
System peripherals  
– 10 low-power modes to provide power optimization  
based on application requirements  
– Memory protection unit with multi-master  
protection  
– 32-channel DMA controller, supporting up to 128  
request sources  
– External watchdog monitor  
– Software watchdog  
– Low-leakage wakeup unit  
This document contains information on a new product. Specifications and  
information herein are subject to change without notice.  
© 2012 Freescale Semiconductor, Inc.  
Preliminary  

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