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JTS8388B-1V1B PDF预览

JTS8388B-1V1B

更新时间: 2024-11-10 22:24:07
品牌 Logo 应用领域
爱特美尔 - ATMEL 转换器
页数 文件大小 规格书
57页 1244K
描述
ADC 8-bit 1 GSPS

JTS8388B-1V1B 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:DIE包装说明:DIE, DIE OR CHIP
针数:46Reach Compliance Code:unknown
ECCN代码:3A991.C.1HTS代码:8542.39.00.01
风险等级:5.69最大模拟输入电压:0.137 V
最小模拟输入电压:-0.137 V转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:R-XUUC-N46最大线性误差 (EL):0.4688%
标称负供电电压:-5 V模拟输入通道数量:1
位数:8功能数量:1
端子数量:46输出位码:BINARY
输出格式:PARALLEL, 8 BITS封装主体材料:UNSPECIFIED
封装代码:DIE封装等效代码:DIE OR CHIP
封装形状:RECTANGULAR封装形式:UNCASED CHIP
电源:+-5 V认证状态:Not Qualified
采样速率:1000 MHz采样并保持/跟踪并保持:SAMPLE
子类别:Analog to Digital Converters标称供电电压:5 V
表面贴装:YES技术:BIPOLAR
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

JTS8388B-1V1B 数据手册

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Features  
8-bit Resolution  
ADC Gain Adjust  
1.5 GHz Full Power Input Bandwidth (-3 dB)  
1 GSPS (min) Sampling Rate  
SINAD = 44.3 dB (7.2 Effective Bits), SFDR = 58 dBc,  
at FS = 1 GSPS, FIN = 20 MHz  
SINAD = 42.9 dB (7.0 Effective Bits), SFDR = 52 dBc,  
at FS = 1 GSPS, FIN = 500 MHz  
SINAD = 40.3 dB (6.8 Effective Bits), SFDR = 50 dBc,  
at FS = 1 GSPS, FIN = 1000 MHz (-3 dB FS)  
2-tone IMD: -52 dBc (489 MHz, 490 MHz) at 1 GSPS  
DNL = 0.3 lsb, INL = 0.7 lsb  
ADC 8-bit  
1 GSPS  
Low Bit Error Rate (10-13) at 1 GSPS  
Very Low Input Capacitance: 3 pF  
500 mVpp Differential or Single-ended Analog Inputs  
Differential or Single-ended 50ECL Compatible Clock Inputs  
ECL or LVDS/HSTL Output Compatibility  
Data Ready Output with Asynchronous Reset  
Gray or Binary Selectable Output Data; NRZ Output Mode  
Power Consumption: 3.4W at Tj = 70°C Typical  
Radiation Tolerance Oriented Design (150 Krad (Si) measured)  
Two Package Versions  
TS8388B  
Evaluation board: TSEV8388B  
Demultiplexer TS81102G0: Companion Device Available  
Applications  
Digital Sampling Oscilloscopes  
Satellite Receiver  
Electronic Countermeasures/Electronic Warfare  
Direct RF Down-conversion  
Description  
The TS8388B is a monolithic 8-bit analog-to-digital converter, designed for digitizing  
wide bandwidth analog signals at very high sampling rates of up to 1 GSPS.  
The TS8388B uses an innovative architecture,  
including an on-chip Sample and Hold (S/H),  
and is fabricated with an advanced  
high speed bipolar process.  
The on-chip S/H has a 1.5 GHz full power  
input bandwidth, providing excellent dynamic  
performance in undersampling applications  
(High IF digitizing).  
Rev. 2144C–BDC–04/03  

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