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JM38510/36101B2A

更新时间： 2024-11-26 22:41:07
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德州仪器 - TI 输出元件
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19页 561K
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4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

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JM38510/36101B2A 数据手册

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SN54173, SN54LS173A, SN74173, SN74LS173A  
4-BIT D-TYPE REGISTERS  
WITH 3-STATE OUTPUTS  
SDLS067A – OCTOBER 1976 – REVISED JUNE 1999  
SN54173, SN54LS173A . . . J OR W PACKAGE  
SN74173 . . . N PACKAGE  
3-State Outputs Interface Directly With  
System Bus  
SN74LS173A . . . D or N PACKAGE  
(TOP VIEW)  
Gated Output-Control LInes for Enabling or  
Disabling the Outputs  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
M
N
V
CC  
Fully Independent Clock Virtually  
Eliminates Restrictions for Operating in  
One of Two Modes:  
– Parallel Load  
– Do Nothing (Hold)  
CLR  
1D  
2D  
3D  
4D  
G2  
G1  
1Q  
2Q  
3Q  
4Q  
For Application as Bus Buffer Registers  
CLK  
GND  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Flat  
(W) Packages, Ceramic Chip Carriers (FK),  
and Standard Plastic (N) and Ceramic (J)  
DIPs  
SN54LS173A . . . FK PACKAGE  
(TOP VIEW)  
TYPICAL  
PROPAGATION  
DELAY TIME  
MAXIMUM  
CLOCK  
FREQUENCY  
TYPE  
3
2
1 20 19  
18  
1D  
2D  
NC  
3D  
4D  
1Q  
2Q  
NC  
3Q  
4Q  
4
5
6
7
8
’173  
23 ns  
18 ns  
35 MHz  
50 MHz  
17  
16  
15  
14  
’LS173A  
description  
9 10 11 12 13  
The ’173 and ’LS173A 4-bit registers include  
D-type flip-flops featuring totem-pole 3-state  
outputs capable of driving highly capacitive  
or relatively low-impedance loads. The  
high-impedance third state and increased  
high-logic-level drive provide these flip-flops with  
the capability of being connected directly to and  
NC – No internal connection  
driving the bus lines in a bus-organized system without need for interface or pull-up components. Up to 128 of  
the SN74173 or SN74LS173A outputs can be connected to a common bus and still drive two Series 54/74 or  
54LS/74LS TTL normalized loads, respectively. Similarly, up to 49 of the SN54173 or SN54LS173A outputs can  
be connected to a common bus and drive one additional Series 54/74 or 54LS/74LS TTL normalized load,  
respectively. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic  
levels, the output control circuitry is designed so that the average output disable times are shorter than the  
average output enable times.  
Gated enable inputs are provided on these devices for controlling the entry of data into the flip-flops. When both  
data-enable (G1, G2) inputs are low, data at the D inputs are loaded into their respective flip-flops on the next  
positive transition of the buffered clock input. Gate output-control (M, N) inputs also are provided. When both  
are low, the normal logic states (high or low levels) of the four outputs are available for driving the loads or bus  
lines. The outputs are disabled independently from the level of the clock by a high logic level at either  
output-control input. The outputs then present a high impedance and neither load nor drive the bus line. Detailed  
operation is given in the function table.  
The SN54173 and SN54LS173A are characterized for operation over the full military temperature range of  
–55°C to 125°C. The SN74173 and SN74LS173A are characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...19

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JM38510/36101B2A 替代型号

型号 品牌 替代类型 描述 数据表
JM38510/36101BFA TI

完全替代

 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS
SN74LS173AN TI

功能相似

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