生命周期: | Active | 零件包装代码: | DIP |
包装说明: | DIP-14 | 针数: | 14 |
Reach Compliance Code: | not_compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | Factory Lead Time: | 1 week |
风险等级: | 5.1 | Is Samacsys: | N |
系列: | S | JESD-30 代码: | R-GDIP-T14 |
长度: | 19.56 mm | 负载电容(CL): | 15 pF |
逻辑集成电路类型: | D FLIP-FLOP | 最大频率@ Nom-Sup: | 75000000 Hz |
最大I(ol): | 0.02 A | 位数: | 1 |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
输出极性: | COMPLEMENTARY | 封装主体材料: | CERAMIC, GLASS-SEALED |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 包装方法: | TUBE |
峰值回流温度(摄氏度): | NOT SPECIFIED | 最大电源电流(ICC): | 25 mA |
Prop。Delay @ Nom-Sup: | 9 ns | 传播延迟(tpd): | 9 ns |
认证状态: | Not Qualified | 筛选级别: | MIL-M-38510 Class B |
座面最大高度: | 5.08 mm | 最大供电电压 (Vsup): | 5.25 V |
最小供电电压 (Vsup): | 4.75 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | MILITARY | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 触发器类型: | POSITIVE EDGE |
宽度: | 6.67 mm | 最小 fmax: | 75 MHz |
Base Number Matches: | 1 |
型号 | 品牌 | 替代类型 | 描述 | 数据表 |
SN54S74J | TI |
完全替代 |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | |
SN74S74N3 | TI |
功能相似 |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
JM38510/07101BCB | NXP |
获取价格 |
S SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, CERAMIC, | |
JM38510/07101BCC | NXP |
获取价格 |
IC S SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, CERAM | |
JM38510/07101BDA | TI |
获取价格 |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | |
JM38510/07101BDB | NXP |
获取价格 |
S SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14 | |
JM38510/07101BDC | NXP |
获取价格 |
IC S SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14, FF/La | |
JM38510/07102BEA | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | |
JM38510/07102BEB | NXP |
获取价格 |
S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, CERAMI | |
JM38510/07102BFA | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | |
JM38510/07102BFC | NXP |
获取价格 |
J-K Flip-Flop, S Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL | |
JM38510/07103BCA | NXP |
获取价格 |
S SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 |