Datasheet > JL82576EBSLAVZ

JL82576EBSLAVZ

更新时间： 2024-01-19 10:53:34

品牌	Logo	应用领域
英特尔 - INTEL		通信时钟局域网外围集成电路
页数	文件大小	规格书
934页	7188K
描述
LAN Controller, CMOS, PBGA576, 25 X 25 MM, 1 MM PITCH, BGA-576

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技术参数
数据手册

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JL82576EBSLAVZ 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	BGA, BGA576,24X24,40
针数：	576	Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01	风险等级：	5.75
地址总线宽度：		边界扫描：	NO
最大时钟频率：	25 MHz	通信协议：	ASYNC, BIT; I2C
外部数据总线宽度：		JESD-30 代码：	S-PBGA-B576
长度：	25 mm	低功率模式：	YES
端子数量：	576	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA576,24X24,40
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	1,1.8,3.3 V
认证状态：	Not Qualified	子类别：	Serial IO/Communication Controllers
最大供电电压：	1.89 V	最小供电电压：	1.71 V
标称供电电压：	1.8 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	1.27 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	25 mm	uPs/uCs/外围集成电路类型：	SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：	1

JL82576EBSLAVZ 数据手册

Intel^®82576 GbE Controller — Diagnostics

SAMPLE /

PRELOAD

The SAMPLE/PRELOAD instruction is used to allow scanning of the

IEEE 1149.1 Std. Instruction

boundary scan register without causing interference to the normal

operation of the device. Two functions can be performed by use of the

Sample/Preload instruction.

SAMPLE – allows a snapshot of the data flowing into

and out of a device to be taken without affecting the normal operation

of the device.

PRELOAD – allows an initial pattern to be placed into the boundary scan

selection of another boundary-scan test operation.

IDCODE

The IDCODE instruction is forced into the parallel

output latches of the instruction register during the

Test-Logic-Reset TAP state. This allows the device

IEEE 1149.1 Std. Instruction

identification register to be selected by manipulation of the broadcast

TMS and TCK signals for testing purposes, as well as by a conventional

instruction register scan operation.

The ID code value for the 82576 A0 is 0x010C9013 (Intel's Vendor ID

= 0x13, Device ID = 0x10C9, Rev ID = 0x0)

HIGHZ

The HIGHZ instruction is used to force all outputs of the device (except

TDO) into a high impedance state. This instruction shall select the

Bypass Register to be connected between TDI and TDO in the Shift-DR

controller state.

IEEE 1149.1 Std. Instruction

§ §

Intel^®82576 GbE Controller

Datasheet

930

320961-015EN

Revision: 2.61

December 2010

1...927 928 929930931 932 933 934

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