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ISL6620ACBZ PDF预览

ISL6620ACBZ

更新时间: 2024-02-25 17:44:50
品牌 Logo 应用领域
英特矽尔 - INTERSIL 驱动器接口集成电路光电二极管
页数 文件大小 规格书
10页 221K
描述
VR11.1 Compatible Synchronous Rectified Buck MOSFET Drivers

ISL6620ACBZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.34
高边驱动器:YES接口集成电路类型:AND GATE BASED MOSFET DRIVER
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:3
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
标称输出峰值电流:4 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:MOSFET Drivers最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

ISL6620ACBZ 数据手册

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ISL6620, ISL6620A  
Description  
2.5V  
t
PWM  
PDHU  
t
t
PDLU  
TSSHD  
t
t
RU  
RU  
t
FU  
t
PTS  
1V  
UGATE  
LGATE  
t
PTS  
1V  
t
RL  
t
TSSHD  
t
PDHL  
t
t
PDLL  
FL  
FIGURE 1. TIMING DIAGRAM  
shoot-through caused by the self turn-on of the lower  
MOSFET due to high dV/dt of the switching node.  
Operation and Adaptive Shoot-through Protection  
Designed for high speed switching, the ISL6620, ISL6620A  
MOSFET driver controls both high-side and low-side  
N-Channel FETs from one externally provided PWM signal.  
Advanced PWM Protocol (Patent Pending)  
The advanced PWM protocol of ISL6620, ISL6620A is  
specifically designed to work with Intersil VR11.1 controllers.  
When ISL6620, ISL6620A detects a PSI protocol sent by an  
Intersil VR11.1 controller, it turns on diode emulation  
operation; otherwise, it remains in normal CCM PWM mode.  
A rising transition on PWM initiates the turn-off of the lower  
MOSFET (see Timing Diagram). After a short propagation  
delay [t  
], the lower gate begins to fall. Typical fall times  
PDLL  
[t ] are provided in the “Electrical Specifications” table on  
FL  
page 4. Adaptive shoot-through circuitry monitors the LGATE  
voltage and turns on the upper gate following a short delay  
The controller communicates the tri-state signal to the driver  
by transitioning the PWM signal from 0V to 2V. The driver  
recognizes Diode Emulation mode and after 330ns  
time [t  
] after the LGATE voltage drops below ~1V. The  
PDHU  
upper gate drive then begins to rise [t ] and the upper  
RU  
(typically) evaluates the PHASE voltage to detect negative  
current, thus turning off LGATE. With no further PWM pulses  
from the controller, both UGATE and LGATE are low and the  
output can shut down. This feature helps prevent a negative  
transient on the output voltage when the output is shut down,  
eliminating the Schottky diode that is used in some systems  
for protecting the load from reversed output voltage events.  
Otherwise, the PWM rising and falling thresholds outlined in  
the “Electrical Specifications” on page 4 determine when the  
lower and upper gates are enabled.  
MOSFET turns on.  
A falling transition on PWM indicates the turn-off of the upper  
MOSFET and the turn-on of the lower MOSFET. A short  
propagation delay [t  
] is encountered before the upper gate  
PDLU  
begins to fall [t ]. The adaptive shoot-through circuitry  
FU  
monitors the UGATE-PHASE voltage and turns on the lower  
MOSFET a short delay time [t  
gate voltage drops below 1V. The lower gate then rises [t ],  
turning on the lower MOSFET. These methods prevent both the  
lower and upper MOSFETs from conducting simultaneously  
(shoot-through), while adapting the dead time to the gate  
charge characteristics of the MOSFETs being used.  
], after the upper MOSFET’s  
PDHL  
RL  
Note that the LGATE will not turn off until the diode emulation  
minimum LGATE ON-time of 350ns is expired for a PWM low  
to tri-level (2.5V) transition.  
This driver is optimized for voltage regulators with large step  
down ratio. The lower MOSFET is usually sized larger  
compared to the upper MOSFET because the lower MOSFET  
conducts for a longer time during a switching period. The  
lower gate driver is therefore sized much larger to meet this  
application requirement. The 0.4Ω ON-resistance and 4A sink  
current capability enable the lower gate driver to absorb the  
current injected into the lower gate through the drain-to-gate  
capacitor of the lower MOSFET and help prevent  
Diode Emulation  
Diode emulation allows for higher converter efficiency under  
light-load situations. With diode emulation active, the  
ISL6620, ISL6620A detects the zero current crossing of the  
output inductor and turns off LGATE. This prevents the low  
side MOSFET from sinking current and ensures that  
discontinuous conduction mode (DCM) is achieved. The  
LGATE has a minimum ON-time of 350ns in DCM mode.  
FN6494.0  
April 25, 2008  
6

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