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IS93C56A-2GRLI PDF预览

IS93C56A-2GRLI

更新时间： 2024-01-12 06:49:36
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
16页 131K
描述
2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM

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IS93C56A-2GRLI 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP8,.25
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.83备用内存宽度：8
最大时钟频率 (fCLK)：1 MHz数据保留时间-最小值：40
耐久性：1000000 Write/Erase CyclesJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.4 mm
内存密度：2048 bit内存集成电路类型：EEPROM
内存宽度：16湿度敏感等级：1
功能数量：1端子数量：8
字数：128 words字数代码：128
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128X16
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行：SERIAL
峰值回流温度（摄氏度）：260电源：2/5 V
认证状态：Not Qualified座面最大高度：1.2 mm
串行总线类型：MICROWIRE最大待机电流：0.000001 A
子类别：EEPROMs最大压摆率：0.003 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.8 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn) - annealed端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3 mm
最长写入周期时间 (tWC)：10 ms写保护：SOFTWARE
Base Number Matches：1

IS93C56A-2GRLI 数据手册

 浏览型号IS93C56A-2GRLI的Datasheet PDF文件第1页浏览型号IS93C56A-2GRLI的Datasheet PDF文件第3页浏览型号IS93C56A-2GRLI的Datasheet PDF文件第4页浏览型号IS93C56A-2GRLI的Datasheet PDF文件第5页浏览型号IS93C56A-2GRLI的Datasheet PDF文件第6页浏览型号IS93C56A-2GRLI的Datasheet PDF文件第7页 
®
IS93C56A  
IS93C66A  
ISSI  
PIN CONFIGURATIONS  
8-Pin DIP, 8-Pin TSSOP  
8-Pin JEDEC SOIC “GR”  
CS  
SK  
1
2
3
4
8
7
6
5
VCC  
NC  
CS  
SK  
1
2
3
4
8
7
6
5
VCC  
NC  
D
IN  
ORG  
GND  
D
IN  
ORG  
GND  
D
OUT  
D
OUT  
instruction begins with a start bit of the logical “1” or  
HIGH. Following this are the opcode (2 bits),  
address field (8 or 9 bits), and data, if appropriate. The  
clock signal may be held stable at any moment to  
suspend the device at its last state, allowing clock-  
speed flexibility. Upon completion of bus  
communication, CS would be pulled LOW. The device  
then would enter Standby mode if no internal  
programmingisunderway.  
PIN DESCRIPTIONS  
CS  
Chip Select  
SK  
Serial Data Clock  
Serial Data Input  
Serial Data Output  
OrganizationSelect  
NotConnected  
Power  
DIN  
DOUT  
ORG  
NC  
Read (READ)  
Vcc  
GND  
The READ instruction is the only instruction that outputs  
serial data on the DOUT pin. After the read instruction and  
address have been decoded, data is transferred from the  
selectedmemoryregisterintoa serialshiftregister.(Please  
note that one logical “0” bit precedes the actual 8 or 16-bit  
outputdatastring.)TheoutputonDOUT changesduringthe  
low-to-high transitions of SK (see Figure 3).  
Ground  
Applications  
The IS93C56A/66A are very popular in many  
applications which require low-power, low-density  
storage. Applications using these devices include  
industrial controls, networking, and numerous other  
Low Voltage Read  
The IS93C56A/66A are designed to ensure that data read  
operations are reliable in low voltage environments. They  
provide accurate operation with Vcc as low as 1.8V.  
consumer electronics.  
Endurance and Data Retention  
Auto Increment Read Operations  
The IS93C56A/66A are designed for applications requiring  
up to 1M programming cycles (WRITE, WRALL, ERASE  
and ERAL). They provide 40 years of secure data retention  
withoutpoweraftertheexecutionof1Mprogrammingcycles.  
In the interest of memory transfer operation applications,  
the IS93C56A/66A are designed to output a continuous  
stream of memory content in response to a single read  
operation instruction. To utilize this function, the system  
asserts a read instruction specifying a start location ad-  
dress. Once the 8 or 16 bits of the addressed register have  
been clocked out, the data in consecutively higher address  
locations is output. The address will wrap around continu-  
ously with CS HIGH until the chip select (CS) control pin is  
brought LOW. This allows for single instruction data dumps  
to be executed with a minimum of firmware overhead.  
Device Operations  
The IS93C56A/66A are controlled by a set of  
instructions which are clocked-in serially on the Din pin.  
Before each low-to-high transition of the clock (SK), the  
CS pin must have already been raised to HIGH, and the  
Din value must be stable at either LOW or HIGH. Each  
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. A  
05/02/06  
1234567...16

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