Datasheet > 存储 > EEPROM> IS93C56-3PI

IS93C56-3PI

更新时间： 2024-02-22 16:11:19

品牌	Logo	应用领域
美国芯成 - ISSI		可编程只读存储器
页数	文件大小	规格书
10页	85K
描述
2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

IS93C56-3PI 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP8,.3
针数：	8	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.32.00.51
风险等级：	5.91	其他特性：	AUTOMATIC WRITE
最大时钟频率 (fCLK)：	1 MHz	数据保留时间-最小值：	10
耐久性：	100000 Write/Erase Cycles	JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0	长度：	9.3218 mm
内存密度：	2048 bit	内存集成电路类型：	EEPROM
内存宽度：	16	功能数量：	1
端子数量：	8	字数：	128 words
字数代码：	128	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	128X16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP8,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3/5 V
认证状态：	Not Qualified	座面最大高度：	4.572 mm
串行总线类型：	MICROWIRE	最大待机电流：	0.00001 A
子类别：	EEPROMs	最大压摆率：	0.006 mA
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3 V	表面贴装：	NO
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
最长写入周期时间 (tWC)：	10 ms	写保护：	SOFTWARE
Base Number Matches：	1

IS93C56-3PI 数据手册

IS93C56-3

ISSI

powers up in the write disabled state. The device then

remains in a write disabled state until a WEN instruction

is executed. Thereafter, the device remains enabled until

a WDS instruction is executed or until Vcc is removed.

(NOTE: Neither the WEN nor the WDS instruction has any

effect on the READ instruction.) (See Figure 4.)

WRALL instruction is being loaded, the address field

becomes a sequence of “Don’t Care” bits (see Figure 6).

As with the WRITE instruction, if CS is brought HIGH after

a minimum wait of 250 ns (tCS), the DOUT pin indicates the

READY/BUSY status of the chip (see Figure 6).

Write Disable (WDS)

Write (WRITE)

The write disable (WDS) instruction disables all program-

ming capabilities. This protects the entire part against

accidental modification of data until a WEN instruction is

executed. (When Vcc is applied, this part powers up in the

write disabled state.) To protect data, a WDS instruction

should be executed upon completion of each programming

operation. (NOTE: Neither the WEN nor the WDS instruction

has any effect on the READ instruction.) (See Figure 7.)

The WRITE instruction includes 16 bits of data to be

written into the specified register. After the last data bit

has been applied to DIN, and before the next rising edge of

SK, CS must be brought LOW. The falling edge of CS

initiates the self-timed programming cycle.

After a minimum wait of 250 ns (5V operation) from the

falling edge of CS (tCS), if CS is brought HIGH, DOUT will

indicate the READY/BUSY status of the chip: logical “0”

means programming is still in progress; logical “1” means

the selected register has been written, and the part is

ready for another instruction (see Figure 5). (NOTE: The

combination of CS HIGH, D^INHIGH and the rising edge of

the SK clock, resets the READY/BUSY flag. Therefore, it

is important if you want to access the READY/BUSY flag

, not to reset it through this combination of control

signals.) Before a WRITE instruction can be executed, the

device must be write enabled (see WEN).

Erase Register (ERASE)

After the erase instruction is entered, CS must be brought

LOW. The falling edge of CS initiates the self-timed internal

programming cycle. Bringing CS HIGH after a minimum of

tCS, will cause DOUT to indicate the READ/BUSY status of

the chip: a logical “0” indicates programming is still in

progress; a logical “1” indicates the erase cycle is complete

and the part is ready for another instruction (see Figure 8).

Erase All (ERAL)

Write All (WRALL)

The write all (WRALL) instruction programs all registers

with the data pattern specified in the instruction. While the

Full chip erase is provided for ease of programming.

Erasing the entire chip involves setting all bits in the entire

memory array to a logical “1” (see Figure 9).

INSTRUCTION SET

Instruction

Start Bit

OP Code

Address

X(A6-A0)

Input Data

READ

WEN

11XXXXXX

(Write Enable)

WRITE

X(A6-A0)

D15-D0⁽¹⁾

WRALL

01XXXXXX

(Write All Registers)

WDS

00XXXXXX

(Write Disable)

ERASE

X(A6-A0)

ERAL

10XXXXXX

(Erase All Registers)

Note: 1. If input data is not 16 bits exactly, the last 16 bits will be taken as input data (a word).

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. G

04/26/01

1 234 5 6 7...10

下载PDF

与IS93C56-3PI相关器件

型号	品牌	描述	获取价格	数据表
IS93C56A	ISSI	2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM	获取价格
IS93C56A-2DLI	ISSI	暂无描述	获取价格
IS93C56A-2GRI	ISSI	2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM	获取价格
IS93C56A-2GRLI	ISSI	2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM	获取价格
IS93C56A-2PI	ISSI	2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM	获取价格
IS93C56A-2PLI	ISSI	2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

IS93C56-3PI

IS93C56-3PI 技术参数

IS93C56-3PI 数据手册

与IS93C56-3PI相关器件

与IS93C56-3PI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

IS93C56-3PI

IS93C56-3PI 技术参数

IS93C56-3PI 数据手册

与IS93C56-3PI相关器件

与IS93C56-3PI相关文章

您还可以找

您在本页遇到什么问题？