IS80C51
®
IS80C51
®
IS80C31
ISSI
ISSI
IS80C31
CMOS SINGLE CHIP
NOVEMBER 1998
8-BIT MICROCONTROLLER
FEATURES
GENERAL DESCRIPTION
The ISSI IS80C51 and IS80C31 are high-performance
microcontrollers fabricated using high-density CMOS
technology. The CMOS IS80C51/31 is functionally
compatible with the industry standard 80C51
microcontrollers.
• 80C51 based architecture
• 4K x 8 ROM (IS80C51 only)
• 128 x 8 RAM
• Two 16-bit Timer/Counters
• Full duplex serial channel
• Boolean processor
The IS80C51/31 is designed with 4K x 8 ROM (IS80C51
only); 128 x 8 RAM; 32 programmable I/O lines; a serial
I/O port for either multiprocessor communications, I/O
expansion or full duplex UART; two 16-bit timer/counters;
a six-source, two-priority-level, nested interrupt structure;
and an on-chip oscillator and clock circuit. The
IS80C51/31 can be expanded using standard TTL
compatible memory.
• Four 8-bit I/O ports, 32 I/O lines
• Memory addressing capability
– 64K ROM and 64K RAM
• Power save modes:
– Idle and power-down
• Six interrupt sources
• Most instructions execute in 0.3 µs
• CMOS and TTL compatible
• Maximum speed: 40 MHz @ Vcc = 5V
• Industrial temperature available
P1.0
P1.1
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
2
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
EA/VPP
• Packages available:
– 40-pin DIP
P1.2
3
P1.3
4
– 44-pin PLCC
– 44-pin PQFP
P1.4
5
P1.5
6
P1.6
7
P1.7
8
RST
9
RxD/P3.0
TxD/P3.1
INT0/P3.2
INT1/P3.3
T0/P3.4
T1/P3.5
WR/P3.6
RD/P3.7
XTAL2
XTAL1
GND
10
11
12
13
14
15
16
17
18
19
20
ALE/PROG
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
Figure 1. IS80C51/31 Pin Configuration: 40-pin PDIP
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
MC003-1D
11/19/98
1