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IS61NLP25636B-200TQLI PDF预览

IS61NLP25636B-200TQLI

更新时间： 2024-11-26 08:35:15
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
37页 940K
描述
ZBT SRAM, 256KX36, 3.1ns, CMOS, PQFP100, LQFP-100

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IS61NLP25636B-200TQLI 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：LQFP,Reach Compliance Code：compliant
HTS代码：8542.32.00.41Factory Lead Time：10 weeks
风险等级：5.8最长访问时间：3.1 ns
JESD-30 代码：R-PQFP-G100长度：20 mm
内存密度：9437184 bit内存集成电路类型：ZBT SRAM
内存宽度：36功能数量：1
端子数量：100字数：262144 words
字数代码：256000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：256KX36封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：RECTANGULAR
封装形式：FLATPACK, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.6 mm
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：3.135 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mm

IS61NLP25636B-200TQLI 数据手册

 浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第2页浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第3页浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第4页浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第5页浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第6页浏览型号IS61NLP25636B-200TQLI的Datasheet PDF文件第7页 
AllꢀRead,ꢀWriteꢀandꢀDeselectꢀcyclesꢀareꢀinitiatedꢀbyꢀtheADVꢀ  
                                                                                                                                                                                             
®
Long-term Support  
World Class Quality  
IS61NLP25636B/IS61NVP/NVVP25636B  
IS61NLP51218B/IS61NVP/NVVP51218B  
256K x 36 and 512K x 18  
AUGUST 2019  
9Mb, PIPELINE 'NO WAIT' STATE BUS SRAM  
FEATURES  
DESCRIPTION  
Theꢀ9ꢀMegꢀproductꢀfamilyꢀfeaturesꢀhigh-speed,ꢀlow-powerꢀ  
synchronousꢀstaticꢀRAMsꢀdesignedꢀtoꢀprovideꢀaꢀburstable,ꢀ  
high-performance,ꢀ'noꢀwait'ꢀstate,ꢀdeviceꢀforꢀnetworkingꢀandꢀ  
communicationsꢀapplications.ꢀTheyꢀareꢀorganizedꢀasꢀ256Kꢀ  
wordsꢀbyꢀ36ꢀbitsꢀandꢀ512Kꢀꢀwordsꢀbyꢀ18ꢀbits,ꢀfabricatedꢀ  
withꢀISSI'sꢀadvancedꢀCMOSꢀtechnology.  
•ꢀ 100ꢀpercentꢀbusꢀutilization  
•ꢀ NoꢀwaitꢀcyclesꢀbetweenꢀReadꢀandꢀWrite  
•ꢀ Internalꢀself-timedꢀwriteꢀcycle  
•ꢀ IndividualꢀByteꢀWriteꢀControl  
•ꢀ SingleꢀR/Wꢀ(Read/Write)ꢀcontrolꢀpin  
Incorporatingꢀ aꢀ 'noꢀ wait'ꢀ stateꢀ feature,ꢀ waitꢀ cyclesꢀ areꢀ  
eliminatedꢀwhenꢀtheꢀbusꢀswitchesꢀfromꢀreadꢀtoꢀwrite,ꢀorꢀ  
writeꢀtoꢀread.ꢀThisꢀdeviceꢀintegratesꢀaꢀ2-bitꢀburstꢀcounter,ꢀ  
high-speedꢀSRAMꢀcore,ꢀandꢀhigh-driveꢀcapabilityꢀoutputsꢀ  
intoꢀaꢀsingleꢀmonolithicꢀcircuit.  
•ꢀ Clockꢀcontrolled,ꢀregisteredꢀaddress,ꢀꢀ  
dataꢀandꢀcontrol  
ꢀ
•ꢀ Interleavedꢀorꢀlinearꢀburstꢀsequenceꢀcontrolꢀus-  
ingꢀMODEꢀinputꢀ  
Allꢀsynchronousꢀinputsꢀpassꢀthroughꢀregistersꢀareꢀcontrolledꢀ  
byꢀaꢀpositive-edge-triggeredꢀsingleꢀclockꢀinput.ꢀOperationsꢀ  
mayꢀbeꢀsuspendedꢀandꢀallꢀsynchronousꢀinputsꢀignoredꢀ  
whenꢀClockꢀEnable,ꢀCKEꢀisꢀHIGH.ꢀInꢀthisꢀstateꢀtheꢀinternalꢀ  
deviceꢀwillꢀholdꢀtheirꢀpreviousꢀvalues.  
•ꢀ Threeꢀchipꢀenablesꢀforꢀsimpleꢀdepthꢀexpansionꢀ  
andꢀaddressꢀpipelining  
•ꢀ PowerꢀDownꢀmode  
•ꢀ Commonꢀdataꢀinputsꢀandꢀdataꢀoutputs  
•ꢀ CKEꢀpinꢀtoꢀenableꢀclockꢀandꢀsuspendꢀoperation  
input.ꢀWhenꢀtheꢀADVꢀisꢀHIGHꢀtheꢀinternalꢀburstꢀcounterꢀ  
isꢀincremented.ꢀNewꢀexternalꢀaddressesꢀcanꢀbeꢀloadedꢀ  
whenꢀADVꢀisꢀLOW.  
•ꢀ JEDECꢀ100-pinꢀQFP,ꢀ165-ballꢀBGAꢀandꢀ119-ballꢀ  
BGAꢀpackages  
Writeꢀ cyclesꢀ areꢀ internallyꢀ self-timedꢀ andꢀ areꢀ initiatedꢀ  
byꢀtheꢀrisingꢀedgeꢀofꢀtheꢀclockꢀinputsꢀandꢀwhenꢀWEꢀisꢀ  
LOW.ꢀSeparateꢀbyteꢀenablesꢀallowꢀindividualꢀbytesꢀtoꢀbeꢀ  
written.  
•ꢀ Powerꢀsupply:  
NLP:ꢀVddꢀ3.3Vꢀ(±ꢀ5%),ꢀVddqꢀ3.3V/2.5Vꢀ(±ꢀ5%)  
ꢀ NVP:ꢀVdd 2.5Vꢀ(±ꢀ5%),ꢀVddqꢀ2.5Vꢀ(±ꢀ5%)  
ꢀ NVVP:ꢀVdd 1.8Vꢀ(±ꢀ5%),ꢀVddqꢀ1.8Vꢀ(±ꢀ5%)  
•ꢀ JTAGꢀBoundaryꢀScanꢀforꢀBGAꢀpackages  
•ꢀ Industrialꢀtemperatureꢀavailable  
ꢀAꢀburstꢀmodeꢀpinꢀ(MODE)ꢀdefinesꢀtheꢀorderꢀofꢀtheꢀburstꢀ  
sequence.ꢀWhenꢀtiedꢀHIGH,ꢀtheꢀinterleavedꢀburstꢀsequenceꢀ  
isꢀselected.ꢀWhenꢀtiedꢀLOW,ꢀtheꢀlinearꢀburstꢀsequenceꢀisꢀ  
selected.  
•ꢀ Lead-freeꢀavailable  
FAST ACCESS TIME  
Symbol  
Parameter  
-250  
2.6ꢀ  
4ꢀ  
-200  
3.1ꢀ  
5ꢀ  
-166  
3.5ꢀ  
6ꢀ  
Units  
ns  
ꢀ
ꢀ
ꢀ
tkqꢀ  
tkcꢀ  
ꢀ
ClockꢀAccessꢀTimeꢀ  
CycleꢀTimeꢀ  
ns  
Frequencyꢀ  
250ꢀ  
200ꢀ  
166ꢀ  
MHz  
Copyright © 2019 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no  
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on  
any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause  
failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written  
assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. A4  
07/19/2019  
1234567...37

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与IS61NLP25636B-200TQLI相关器件

型号 品牌 获取价格 描述 数据表
IS61NLP25672 ISSI

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 		256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP25672-200B1 ISSI

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 		256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP25672-200B1I ISSI

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 		256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP25672-200B1LI ISSI

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 		ZBT SRAM, 256KX72, 3.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, LEAD FREE, PLASTIC, LFBGA
IS61NLP25672-250B1 ISSI

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 		256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP25672-250B1I ISSI

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 		256K x 72, 512K x 36 and 1M x 18 18Mb, PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP409618B ISSI

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 		100 percent bus utilization
IS61NLP409618B-166B2LI ISSI

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 		ZBT SRAM, 4MX18, 3.5ns, CMOS, PBGA119, BGA-119
IS61NLP409618B-166B3L ISSI

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 		ZBT SRAM, 4MX18, 3.5ns, CMOS, PBGA165, TFBGA-165
IS61NLP409618B-166B3LI ISSI

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 		ZBT SRAM, 4MX18, 3.5ns, CMOS, PBGA165, TFBGA-165

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