Datasheet > 存储 > SRAM> IS61C12816-15KI

IS61C12816-15KI

更新时间： 2024-11-23 22:34:43

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
8页	104K
描述
128K x 16 HIGH-SPEED CMOS STATIC RAM

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IS61C12816-15KI 数据手册

IS61C12816

ISSI^®

128K x 16 HIGH-SPEED CMOS STATIC RAM

DECEMBER 2000

FEATURES

DESCRIPTION

The ISSI IS61C12816 is a high-speed, 2,097,152-bit static

RAM organized as 131,072 words by 16 bits. It is fabricated

ꢁsingISSI'shigh-performanceCMOStechnology. Thishighly

reliable process coꢁpled with innovative circꢁit design tech-

niqꢁes, yields access times as fast as 12 ns with low power

consꢁmption.

• High-speed access time: 12, 15, and 20 ns

• CMOS low power operation

— 450 mW (typical) operating

— 250 µW (typical) standby

• TTL compatible interface levels

• Single 5V 10ꢀ power sꢁpply

WhenCEisHIGH(deselected),thedeviceassꢁmesastandby

mode at which the power dissipation can be redꢁced down

with CMOS inpꢁt levels.

• Fꢁlly static operation: no clock or refresh

reqꢁired

• Three state oꢁtpꢁts

Easy memory expansion is provided by ꢁsing Chip Enable

and Oꢁtpꢁt Enable inpꢁts, CE and OE. The active LOW Write

Enable(WE)controlsbothwritingandreadingofthememory.A

databyteallowsUpperByte(UB)andLowerByte(LB)access.

• Indꢁstrial temperatꢁre available

• Available in 44-pin SOJ package and

44-pin TSOP(II)

The IS61C12816 is packaged in the JEDEC standard 44-pin

400-mil SOJ and 44-pin TSOP(II).

FUNCTIONAL BLOCK DIAGRAM

128K x 16

MEMORY ARRAY

A0-A16

DECODER

VCC

GND

I/O0-I/O7

Lower Byte

I/O

DATA

COLUMN I/O

CIRCUIT

I/O8-I/O15

Upper Byte

CONTROL

CIRCUIT

ISSI reserves the right to make changes to its prodꢁcts at any time withoꢁt notice in order to improve design and sꢁpply the best possible prodꢁct. We assꢁme no responsibility for any

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

12/19/00

12 3 4 5 6 7 8

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