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IS61C1024AL-12JI-TR PDF预览

IS61C1024AL-12JI-TR

更新时间: 2024-11-09 12:58:27
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
17页 106K
描述
Standard SRAM, 128KX8, 12ns, CMOS, PDSO32

IS61C1024AL-12JI-TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.92
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-J32内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装等效代码:SOJ32,.34封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
电源:5 V认证状态:Not Qualified
最大待机电流:0.00045 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.05 mA
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

IS61C1024AL-12JI-TR 数据手册

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®
IS61C1024AL  
IS64C1024AL  
ISSI  
128K x 8 HIGH-SPEED CMOS STATIC RAM  
JANUARY2005  
DESCRIPTION  
FEATURES  
TheISSIIS61C1024AL/IS64C1024ALisaveryhigh-speed,  
lowpower,131,072-wordby8-bitCMOSstaticRAMs.They  
are fabricated using ISSI's high-performance CMOS  
technology. This highly reliable process coupled with  
innovative circuit design techniques, yields higher  
performance and low power consumption devices.  
• High-speed access time: 12, 15 ns  
Low active power: 160 mW (typical)  
Low standby power: 1000 µW (typical) CMOS  
standby  
• Output Enable (OE) and two Chip Enable  
(CE1 and CE2) inputs for ease in applications  
WhenCE1isHIGHorCE2isLOW(deselected),thedevice  
assumes a standby mode at which the power dissipation  
can be reduced by using CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
Easy memory expansion is provided by using two Chip  
Enableinputs,CE1andCE2.TheactiveLOWWriteEnable  
(WE) controls both writing and reading of the memory.  
• TTL compatible inputs and outputs  
• Single 5V (±10%) power supply  
• Commercial, industrial, and automotive tempera-  
ture ranges available  
TheIS61C1024AL/IS64C1024ALisavailablein32-pin300-  
mil SOJ, 32-pin 400-mil SOJ, 32-pin TSOP (Type I, 8x20),  
and 32-pin sTSOP (Type I, 8 x 13.4) packages.  
• Lead free available  
FUNCTIONAL BLOCK DIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE1  
CONTROL  
CIRCUIT  
CE2  
OE  
WE  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to  
obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. B  
1
01/24/05  

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