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IS42S16100F-7TL PDF预览

IS42S16100F-7TL

更新时间: 2023-01-02 15:26:13
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器光电二极管
页数 文件大小 规格书
86页 1568K
描述
Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, 0.400 INCH, LEAD FREE, TSOP2-50

IS42S16100F-7TL 数据手册

 浏览型号IS42S16100F-7TL的Datasheet PDF文件第2页浏览型号IS42S16100F-7TL的Datasheet PDF文件第3页浏览型号IS42S16100F-7TL的Datasheet PDF文件第4页浏览型号IS42S16100F-7TL的Datasheet PDF文件第5页浏览型号IS42S16100F-7TL的Datasheet PDF文件第6页浏览型号IS42S16100F-7TL的Datasheet PDF文件第7页 
IS42/45S16100F, IS42VS16100F  
512K Words x 16 Bits x 2 Banks  
16Mb SDRAM  
JUNE 2012  
FEATURES  
DESCRIPTION  
•ꢀ Clockꢀfrequency:ꢀ  
ISSI’sꢀ16MbꢀSynchronousꢀDRAMꢀIS42S16100F,ꢀ  
IS45S16100FꢀandꢀIS42VS16100Fꢀareꢀeachꢀorganizedꢀ  
asꢀaꢀ524,288-wordꢀxꢀ16-bitꢀxꢀ2-bankꢀforꢀimprovedꢀ  
performance.ꢀTheꢀsynchronousꢀDRAMsꢀachieveꢀhigh-  
speedꢀdataꢀtransferꢀusingꢀpipelineꢀarchitecture.ꢀAllꢀ  
inputsꢀandꢀoutputsꢀsignalsꢀreferꢀtoꢀtheꢀrisingꢀedgeꢀofꢀtheꢀ  
clockꢀinput.  
ꢀ IS42/45S16100F:ꢀ200,ꢀ166,ꢀ143ꢀMHzꢀ  
IS42VS16100F:ꢀ133,ꢀ100ꢀMHz  
•ꢀ Fullyꢀsynchronous;ꢀallꢀsignalsꢀreferencedꢀtoꢀaꢀ  
positiveꢀclockꢀedge  
•ꢀ Twoꢀbanksꢀcanꢀbeꢀoperatedꢀsimultaneouslyꢀandꢀ  
independently  
ADDRESS TABLE  
Parameter  
•ꢀ DualꢀinternalꢀbankꢀcontrolledꢀbyꢀA11ꢀꢀ  
(bankꢀselect)  
IS42/45S16100F IS42VS16100F  
PowerꢀSupplyꢀVdd/Vddq  
RefreshꢀCount  
3.3V  
1.8V  
•ꢀ Singleꢀpowerꢀsupply:ꢀ  
2K/32ms  
2K/32ms  
IS42/45S16100F:ꢀVdd/Vddqꢀ=ꢀ3.3V  
IS42VS16100F:ꢀVdd/Vddqꢀ=ꢀ1.8V  
RowꢀꢀAddressing  
ColumnꢀAddressing  
BankꢀAddressing  
PrechargeꢀAddressing  
A0-A10  
A0-A7  
A11  
•ꢀ LVTTLꢀinterface  
•ꢀ Programmableꢀburstꢀlengthꢀꢀ  
–ꢀ(1,ꢀ2,ꢀ4,ꢀ8,ꢀfullꢀpage)  
A10  
•ꢀ Programmableꢀburstꢀsequence:ꢀꢀ  
Sequential/Interleave  
KEY TIMING PARAMETERS  
•ꢀ 2048ꢀrefreshꢀcyclesꢀeveryꢀ32ꢀms  
Parameter  
-5(1)  
-6(2) -7 (2) -75 (3) -10 (3) Unit  
•ꢀ Randomꢀcolumnꢀaddressꢀeveryꢀclockꢀcycle  
•ꢀ ProgrammableꢀCASꢀlatencyꢀ(2,ꢀ3ꢀclocks)  
CLK Cycle Time  
CAS Latency = 3  
CAS Latency = 2  
CLK Frequency  
CAS Latency = 3  
CAS Latency = 2  
5
6
7
7.5  
10  
10  
12  
ns  
ns  
•ꢀ Burstꢀread/writeꢀandꢀburstꢀread/singleꢀwriteꢀꢀ  
operationsꢀcapability  
10  
10  
10  
•ꢀ Burstꢀterminationꢀbyꢀburstꢀstopꢀandꢀꢀ  
prechargeꢀcommand  
200 166 143  
100 100 100  
133  
100  
100 Mhz  
83  
Mhz  
•ꢀ ByteꢀcontrolledꢀbyꢀLDQMꢀandꢀUDQM  
Access Time from  
Clock  
•ꢀ Packagesꢀ400-milꢀ50-pinꢀTSOP-IIꢀandꢀ60-ballꢀ  
BGA  
CAS Latency = 3  
CAS Latency = 2  
5
6
5.5  
6
5.5  
6
6
8
7
8
ns  
ns  
•ꢀ Lead-freeꢀpackageꢀoption  
•ꢀ AvailableꢀinꢀIndustrialꢀꢀTemperature  
Notes:  
1. Available for IS42S16100F only  
2. Available for IS42S16100F and IS45S16100F only  
3. Available for IS42VS16100F only  
Copyrightꢀ©ꢀ2012ꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀꢀAllꢀrightsꢀreserved.ꢀꢀISSIꢀreservesꢀtheꢀrightꢀtoꢀmakeꢀchangesꢀtoꢀthisꢀspecificationꢀandꢀitsꢀproductsꢀatꢀanyꢀtimeꢀwithoutꢀ  
notice.ꢀꢀꢀISSIꢀassumesꢀnoꢀliabilityꢀarisingꢀoutꢀofꢀtheꢀapplicationꢀorꢀuseꢀofꢀanyꢀinformation,ꢀproductsꢀorꢀservicesꢀdescribedꢀherein.ꢀCustomersꢀareꢀadvisedꢀtoꢀobtainꢀtheꢀ  
latestꢀversionꢀofꢀthisꢀdeviceꢀspecificationꢀbeforeꢀrelyingꢀonꢀanyꢀpublishedꢀinformationꢀandꢀbeforeꢀplacingꢀordersꢀforꢀproducts.ꢀ  
IntegratedꢀSiliconꢀSolution,ꢀInc.ꢀdoesꢀnotꢀrecommendꢀtheꢀuseꢀofꢀanyꢀofꢀitsꢀproductsꢀinꢀlifeꢀsupportꢀapplicationsꢀwhereꢀtheꢀfailureꢀorꢀmalfunctionꢀofꢀtheꢀproductꢀcanꢀreason-  
ablyꢀbeꢀexpectedꢀtoꢀcauseꢀfailureꢀofꢀtheꢀlifeꢀsupportꢀsystemꢀorꢀtoꢀsignificantlyꢀaffectꢀitsꢀsafetyꢀorꢀeffectiveness.ꢀProductsꢀareꢀnotꢀauthorizedꢀforꢀuseꢀinꢀsuchꢀapplicationsꢀ  
unlessꢀIntegratedꢀSiliconꢀSolution,ꢀInc.ꢀreceivesꢀwrittenꢀassuranceꢀtoꢀitsꢀsatisfaction,ꢀthat:  
a.)ꢀtheꢀriskꢀofꢀinjuryꢀorꢀdamageꢀhasꢀbeenꢀminimized;  
b.)ꢀtheꢀuserꢀassumeꢀallꢀsuchꢀrisks;ꢀand  
c.)ꢀpotentialꢀliabilityꢀofꢀIntegratedꢀSiliconꢀSolution,ꢀIncꢀisꢀadequatelyꢀprotectedꢀunderꢀtheꢀcircumstances  
Integrated Silicon Solution, Inc. — www.issi.com ꢀ  
1
Rev. A  
06/13/2012  

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