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IMP811JEUS-T

更新时间: 2024-10-27 22:09:55
品牌 Logo 应用领域
IMP 微处理器监控
页数 文件大小 规格书
8页 139K
描述
4-pin レP Voltage Supervisor with Manual Reset

IMP811JEUS-T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:, TO-253LOWReach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.78可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDSO-G4
JESD-609代码:e0端子数量:4
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装等效代码:TO-253LOW
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:1.2/5.5 V认证状态:Not Qualified
子类别:Power Management Circuits最大供电电流 (Isup):0.025 mA
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子位置:DUAL
阈值电压标称:+4VBase Number Matches:1

IMP811JEUS-T 数据手册

 浏览型号IMP811JEUS-T的Datasheet PDF文件第2页浏览型号IMP811JEUS-T的Datasheet PDF文件第3页浏览型号IMP811JEUS-T的Datasheet PDF文件第4页浏览型号IMP811JEUS-T的Datasheet PDF文件第5页浏览型号IMP811JEUS-T的Datasheet PDF文件第7页浏览型号IMP811JEUS-T的Datasheet PDF文件第8页 
IMP811, IMP812  
Application Information  
RESET Output Operation  
In µP/µC systems it is important to have the processor begin  
operation from a known state or be able to return the system to a  
known state. A RESET output to a processor is provided to pre-  
vent improper operation during power supply sequencing or low  
voltage – brownout – conditions.  
If V drops below the reset threshold, RESET automatically  
CC  
becomes active. Alternatively, external circuitry or a human oper-  
ator can initiate this condition using the Manual Reset (MR) pin.  
There is an internal pullup on MR so it can be left open if it is not  
used. MR can be driven by TTL/CMOS logic or even an external  
switch, since it is already debounced. If the switch is at the end of  
a long cable, it might require a bypass (100nF) at the pin if noise  
pickup is a problem.  
The IMP811/812 are designed to monitor the system power sup-  
ply voltages and issue a RESET signal when levels are out of  
range. RESET outputs are guaranteed to be active for V above  
CC  
1.1V. When V exceeds the reset threshold, an internal timer  
CC  
Six voltage thresholds are available to support 3V and 5V systems:  
keeps RESET active for the reset timeout period, after which  
RESET becomes inactive (HIGH for the IMP811 and LOW for the  
IMP812).  
Reset Threshold  
Suffix  
Voltage (V)  
4.63  
L
M
J
4.38  
4.00  
T
S
R
3.08  
2.93  
2.63  
Valid Reset with VCC under 1.1V  
Negative VCC Transients  
To ensure that logic inputs connected to the IMP811 RESET pin Typically short duration transients of 100mV amplitude and 20µs  
are in a known state when VCC is under 1.1V, a 100kpull-down duration do not cause a false RESET. A 0.1µF capacitor at VCC  
resistor at RESET is needed. The value is not critical.  
increases transient immunity.  
A similar pull-up resistor to VCC is needed with the IMP812.  
V
V
CC  
CC  
100kΩ  
IMP812  
IMP811  
Power  
Power  
Supply  
Supply  
MR  
RESET  
MR  
RESET  
100k  
GND  
GND  
811/12_05.eps  
811/12_04.eps  
Figure 2. RESET Valid with VCC Under 1.1V  
Figure 3. RESET Valid with VCC Under 1.1V  
408-432-9100/www.impweb.com  
© 1999 IMP, Inc.  
6

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