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IDT74FCT16500ATPVG PDF预览

IDT74FCT16500ATPVG

更新时间: 2024-10-27 20:57:47
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
7页 76K
描述
Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, GREEN, SSOP-56

IDT74FCT16500ATPVG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:unknown
风险等级:5.56其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:18功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:5.1 ns
传播延迟(tpd):5.6 ns认证状态:Not Qualified
座面最大高度:2.794 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30翻译:N/A
触发器类型:NEGATIVE EDGE宽度:7.5 mm
Base Number Matches:1

IDT74FCT16500ATPVG 数据手册

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IDT74FCT16500AT/CT  
FAST CMOS 18-BIT  
REGISTERED  
TRANSCEIVER  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The FCT16500T 18-bit registered transceivers are built using advanced  
dualmetalCMOStechnology.Thesehigh-speed,low-power18-bitregistered  
bustransceiverscombineD-typelatchesandD-typeflip-flopstoallowdataflow  
in transparent, latched and clocked modes. Data flow in each direction is  
controlledbyoutput-enable(OEABandOEBA),latchenable(LEABandLEBA)  
andclock(CLKABandCLKBA)inputs. ForA-to-Bdataflow,thedeviceoperates  
intransparentmodewhenLEABishigh.WhenLEABislow,theAdataislatched  
ifCLKABisheldatahighorlowlogiclevel.IfLEABislow,theAbusdataisstored  
inthelatch/flip-floponthehigh-to-lowtransitionofCLKAB.OEABperforms the  
outputenablefunction ontheBport.DataflowfromBporttoAportissimilarbut  
uses OEBA, LEBA and CLKBA. Flow-through organization of signal pins  
simplifies layout. All inputs are designed with hysteresis for improved noise  
margin.  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 5V ±10%  
High drive outputs (–32mA IOH, 64mA IOL)  
• Power off disable outputs permit “live insertion”  
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,  
TA = 25°C  
Available in SSOP package  
The FCT16500Tare ideallysuitedfordrivinghigh-capacitance loads and  
low-impedance backplanes. The output buffers are designed with power off  
disable capabilitytoallow"live insertion"ofboards whenusedas backplane  
drivers.  
FUNCTIONALBLOCKDIAGRAM  
1
OEAB  
30  
CLKBA  
28  
LEBA  
27  
OEBA  
55  
CLKAB  
2
LEAB  
C
C
54  
B
1
3
D
A1  
D
C
D
C
D
TO 17 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
SEPTEMBER 2009  
1
© 2009 Integrated Device Technology, Inc.  
DSC-5433/5  

IDT74FCT16500ATPVG 替代型号

型号 品牌 替代类型 描述 数据表
74FCT162500ATPVCG4 TI

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