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IDT74FCT16501AT_06 PDF预览

IDT74FCT16501AT_06

更新时间: 2024-10-28 05:33:27
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 79K
描述
FAST CMOS 18-BIT REGISTERED TRANSCEIVER

IDT74FCT16501AT_06 数据手册

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FAST CMOS  
18-BIT REGISTERED  
TRANSCEIVER  
IDT74FCT16501AT/CT  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The FCT16501T 18-bit registered transceivers are built using advanced  
dualmetalCMOStechnology.Thesehigh-speed,low-power18-bitregistered  
bustransceiverscombineD-typelatchesandD-typeflip-flopstoallowdataflow  
in transparent, latched and clocked modes. Data flow in each direction is  
controlledbyoutput-enable(OEABandOEBA),latchenable(LEABandLEBA)  
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device  
operatesintransparentmodewhenLEABishigh.WhenLEABislow,theAdata  
islatchedifCLKABisheldatahighorlowlogiclevel. IfLEABislow,theAbus  
dataisstoredinthelatch/flip-floponthelow-to-hightransitionofCLKAB.OEAB  
is theoutputenablefortheBport.DataflowfromtheBporttotheAportissimilar  
but requires using OEBA, LEBA and CLKBA. Flow-through organization of  
signalpinssimplifieslayout.Allinputsaredesignedwithhysteresisforimproved  
noisemargin.  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
High drive outputs (–32mA IOH, 64mA IOL)  
• Power off disable outputs permit “live insertion”  
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,  
TA = 25°C  
Available in TSSOP package  
TheFCT16501Tareideallysuitedfordrivinghigh-capacitanceloadsand  
low-impedancebackplanes.Theoutputbuffers aredesignedwithpoweroff  
disablecapabilitytoallow"liveinsertion"ofboardswhenusedasbackplane  
drivers.  
FUNCTIONALBLOCKDIAGRAM  
1
OEAB  
30  
CLKBA  
28  
LEBA  
27  
OEBA  
55  
CLKAB  
2
LEAB  
C
C
54  
B1  
3
A1  
D
D
C
D
C
D
TO 17 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
june 2006  
1
© 2006 Integrated Device Technology, Inc.  
DSC-5435/4  

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