IDT54/74FCT16501AT/CT/ET
IDT54/74FCT162501AT/CT/ET
IDT54/74FCT162H501AT/CT/ET
FAST CMOS
18-BIT REGISTERED
TRANSCEIVER
Integrated Device Technology, Inc.
CMOS technology. These high-speed, low-power 18-bit reg-
istered bus transceivers combine D-type latches and D-type
flip-flopstoallowdataflowintransparent, latchedandclocked
modes. Data flow in each direction is controlled by output-
enable (OEAB and OEBA), latch enable (LEAB and LEBA)
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow,
thedeviceoperatesintransparentmodewhenLEABisHIGH.
When LEAB is LOW, the A data is latched if CLKAB is held at
a HIGH or LOW logic level. If LEAB is LOW, the A bus data
isstoredinthelatch/flip-flopontheLOW-to-HIGHtransitionof
CLKAB. OEAB is the output enable for the B port. Data flow
fromtheBporttotheAportissimilarbutrequiresusing OEBA,
LEBA and CLKBA. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for
improved noise margin.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤ 1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
• Features for FCT16501AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
The FCT16501AT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
• Features for FCT162501AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
The FCT162501AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimalundershoot,andcontrolledoutputfalltimes–reducing
the need for external series terminating resistors. The
FCT162501AT/CT/ET are plug-in replacements for the
FCT16501AT/CT/ET and ABT16501 for on-board bus inter-
face applications.
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
• Features for FCT162H501AT/CT/ET:
– Bus Hold retains last active bus state during 3-state
– Eliminates the need for external pull up resistors
The FCT162H501AT/CT/ET have "Bus Hold" which re-
tains the input's last state whenever the input goes to high
impedance. This prevents "floating" inputs and eliminates the
need for pull-up/down resistors.
DESCRIPTION:
The FCT16501AT/CT/ET and FCT162501AT/CT/ET 18-
bitregisteredtransceiversarebuiltusingadvanceddualmetal
FUNCTIONAL BLOCK DIAGRAM
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
C
B1
A1
D
D
C
D
C
D
TO 17 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2547 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.10
DSC-2547/8
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