Datasheet > 逻辑 > 解码器/驱动器> IDT74FCT138ATLB

IDT74FCT138ATLB

更新时间： 2024-11-05 22:39:19

品牌	Logo	应用领域
艾迪悌 - IDT		解码器
页数	文件大小	规格书
6页	110K
描述
FAST CMOS 1-OF-8 DECODER WITH ENABLE

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中文翻译

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数据手册

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IDT74FCT138ATLB 数据手册

FAST CMOS

IDT54/74FCT138T/AT/CT

1-OF-8 DECODER

WITH ENABLE

Integrated Device Technology, Inc.

FEATURES:

• Std., A and C speed grades

• Low input and output leakage ≤1µA (max.)

• CMOS power levels

• True TTL input and output compatibility

– VOH = 3.3V (typ.)

DESCRIPTION:

The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built

using an advanced dual metal CMOS technology. The IDT54/

74FCT138T/AT/CT accepts three binary weighted inputs (A0,

A1, A2) and, when enabled, provides eight mutually exclusive

active LOW outputs (O0-O7). The IDT54/74FCT138T/AT/CT

features three enable inputs, two active LOW (E1, E2) and one

activeHIGH(E3).AlloutputswillbeHIGHunlessE1 andE2 are

LOW and E3 is HIGH. This multiple enable function allows

easy parallel expansion of the device to a 1-of-32 (5 lines to

32 lines) decoder with just four IDT54/74FCT138T/AT/CT

devices and one inverter.

– VOL = 0.3V (typ.)

• High drive outputs (-15mA IOH, 48mA IOL)

• Meets or exceeds JEDEC standard 18 specifications

• Product available in Radiation Tolerant and Radiation

Enhanced versions

• Military product compliant to MIL-STD-883, Class B

and DESC listed (dual marked)

• Available in DIP, SOIC, QSOP, CERPACK and

LCC packages

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

A2 A1

E1 E2 E3

VCC

P16-1

D16-1

SO16-1

SO16-7

E16-1

GND

2570 drw 02

DIP/SOIC/QSOP/CERPACK

TOP VIEW

INDEX

20 19

2570 drw 01

L20-2

9 10 11 12 13

2570 drw 03

LCC

TOP VIEW

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

APRIL 1995

1995 Integrated Device Technology, Inc.

6.3

DSC-4213/5

12 3 4 5 6

中文翻译

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