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IDT72V70210BC PDF预览

IDT72V70210BC

更新时间: 2024-11-14 22:12:51
品牌 Logo 应用领域
艾迪悌 - IDT 开关电信集成电路
页数 文件大小 规格书
19页 118K
描述
3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 1,024 x 1,024

IDT72V70210BC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:13 X 13 MM, 1.0 MM PITCH, BGA-144
针数:144Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.17
Is Samacsys:NJESD-30 代码:S-PBGA-B144
JESD-609代码:e0长度:13 mm
湿度敏感等级:3功能数量:1
端子数量:144最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA144,12X12,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):225电源:3.3 V
认证状态:Not Qualified座面最大高度:1.97 mm
子类别:Other Telecom ICs最大压摆率:0.02 mA
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:DIGITAL TIME SWITCH温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn63Pb37)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:13 mm
Base Number Matches:1

IDT72V70210BC 数据手册

 浏览型号IDT72V70210BC的Datasheet PDF文件第2页浏览型号IDT72V70210BC的Datasheet PDF文件第3页浏览型号IDT72V70210BC的Datasheet PDF文件第4页浏览型号IDT72V70210BC的Datasheet PDF文件第5页浏览型号IDT72V70210BC的Datasheet PDF文件第6页浏览型号IDT72V70210BC的Datasheet PDF文件第7页 
3.3 VOLT TIME SLOT INTERCHANGE  
DIGITAL SWITCH  
IDT72V70210  
1,024 x 1,024  
Flatpack (TQFP) packages  
FEATURES:  
Operating Temperature Range -40°C to +85°C  
3.3V I/O with 5V tolerant inputs and TTL compatible outputs  
32 serial input and output streams  
1,024 x 1,024 channel non-blocking switching at 2.048 Mb/s  
Per-channel Variable Delay Mode for low-latency applications  
Per-channel Constant Delay Mode for frame integrity applications  
Automatic identification of ST-BUS® and GCI serial streams  
Automatic frame offset delay measurement  
Per-stream frame delay offset programming  
Per-channel high impedance output control  
Per-channel processor mode to allow microprocessor writes to  
TXstreams  
DESCRIPTION:  
The IDT72V70210 has a non-blocking switch capacity of 1,024 x 1,024  
channels at 2.048 Mb/s. With 32 inputs and 32 outputs, programmable per  
streamcontrol,andavarietyofoperatingmodestheIDT72V70210isdesigned  
fortheTDMtimeslotinterchangefunctionineithervoiceordataapplications.  
Some of the main features of the IDT72V70210 are low power 3.3 Volt  
operation, automatic ST-BUS®/GCI sensing, memory block programming,  
simplemicroprocessorinterface,onecycledirectinternalmemoryaccesses,  
JTAGTestAccessPort(TAP)andperstreamprogrammableinputoffsetdelay,  
variableorconstantthroughputmodes,internalloopback,outputenable,and  
ProcessorMode.  
Direct microprocessor access to all internal memories  
Memory block programming for quick set-up  
IEEE-1149.1 (JTAG) Test Port  
Internal Loopback for testing  
· Available in 144-pin Ball Grid Array (BGA) and 144-pin Thin Quad  
FUNCTIONAL BLOCK DIAGRAM  
Vcc GND  
TMS TDI  
TCK TRST  
ODE  
RESET  
TDO  
Test Port  
Loopback  
RX0  
RX1  
TX0  
TX1  
RX2  
TX2  
RX3  
TX3  
RX4  
TX4  
RX5  
TX5  
RX6  
TX6  
RX7  
TX7  
Output  
MUX  
RX8  
TX8  
RX9  
TX9  
RX10  
RX11  
RX12  
RX13  
RX14  
RX15  
RX16  
RX17  
RX18  
RX19  
RX20  
RX21  
RX22  
RX23  
RX24  
RX25  
RX26  
RX27  
RX28  
RX29  
RX30  
RX31  
TX10  
TX11  
TX12  
TX13  
TX14  
TX15  
TX16  
TX17  
TX18  
TX19  
TX20  
TX21  
TX22  
TX23  
TX24  
TX25  
TX26  
TX27  
TX28  
TX29  
TX30  
TX31  
Data Memory  
Receive  
Serial Data  
Streams  
Transmit  
Serial Data  
Streams  
Connection  
Memory  
Internal  
Registers  
Timing Unit  
Microprocessor Interface  
5714 drw01  
CLK  
F0i  
DS  
CS  
DTA  
FE  
IC  
R/W A0-A11  
D0-D15  
IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc.TheST-BUS isatrademariofMitelCorp.  
JANUARY 2005  
1
2005 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-5714/4  

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