Datasheet > 存储 > FIFO> IDT72421L50PFB

IDT72421L50PFB

更新时间： 2024-11-01 04:58:27

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
19页	200K
描述
CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9

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IDT72421L50PFB 数据手册

IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO

MILITARY AND COMMERCIAL TEMPERATURE RANGES

^{64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9}CMOS SyncFIFO

IDT72421

IDT72201

IDT72211

IDT72221

IDT72231

IDT72241

64 X 9, 256 x 9, 512 x 9,

1024 X 9, 2048 X 9 and 4096 x 9

Integrated Device Technology, Inc.

FEATURES:

• 64 x 9-bit organization (IDT72421)

• 256 x 9-bit organization (IDT72201)

• 512 x 9-bit organization (IDT72211)

• 1024 x 9-bit organization (IDT72221)

• 2048 x 9-bit organization (IDT72231)

• 4096 x 9-bit organization (IDT72241)

Out (FIFO) memories with clocked read and write controls.

The IDT72421/72201/72211/72221/72231/72241 have a 64,

256, 512, 1024, 2048, and 4096 x 9-bit memory array,

respectively. These FIFOs are applicable for a wide variety of

data buffering needs such as graphics, local area networks

and interprocessor communication.

These FIFOs have 9-bit input and output ports. The input

port is controlled by a free-running clock (WCLK), and two

write enable pins (WEN1, WEN2). Data is written into the

Synchronous FIFO on every rising clock edge when the write

enable pins are asserted. The output port is controlled by

another clock pin (RCLK) and two read enable pins (REN1,

REN2). The read clock can be tied to the write clock for single

clockoperationorthetwoclockscanrunasynchronousofone

another for dual-clock operation. An output enable pin (OE) is

provided on the read port for three-state control of the output.

The Synchronous FIFOs have two fixed flags, Empty (EF)

and Full (FF). Two programmable flags, Almost-Empty (PAE)

and Almost-Full (PAF), are provided for improved system

control. TheprogrammableflagsdefaulttoEmpty+7andFull-

7 for PAE and PAF, respectively. The programmable flag

offset loading is controlled by a simple state machine and is

initiated by asserting the load pin (LD).

• 12 ns read/write cycle time (IDT72421/72201/72211)

• 15 ns read/write cycle time (IDT72221/72231/72241)

• Read and write clocks can be independent

• Dual-Ported zero fall-through time architecture

• Empty and Full flags signal FIFO status

• Programmable Almost-Empty and Almost-Full flags can

be set to any depth

• Programmable Almost-Empty and Almost-Full flags

default to Empty+7, and Full-7, respectively

• Output enable puts output data bus in high-impedance

state

• Advanced submicron CMOS technology

• Available in 32-pin plastic leaded chip carrier (PLCC),

ceramic leadless chip carrier (LCC), and 32-pin Thin

Quad Flat Pack (TQFP)

• For Through-Hole product please see the IDT72420/

72200/72210/72220/72230/72240 data sheet

• Military product compliant to MIL-STD-883, Class B

The IDT72421/72201/72211/72221/72231/72241 are

fabricated using IDT’s high-speed submicron CMOS

technology. Military grade product is manufactured in

compliance with the latest revision of MIL-STD-883, Class B.

DESCRIPTION:

The IDT72421/72201/72211/72221/72231/72241

SyncFIFO are very high-speed, low-power First-In, First-

FUNCTIONAL BLOCK DIAGRAM

D0 - D8

WCLK

WEN1

WEN2

INPUT REGISTER

OFFSET REGISTER

FLAG

LOGIC

PAE

PAF

WRITE CONTROL

LOGIC

RAM ARRAY

64 x 9, 256 x 9,

512 x 9, 1024 x 9,

2048 x 9, 4096 x 9

WRITE POINTER

READ POINTER

READ CONTROL

LOGIC

OUTPUT REGISTER

RESET LOGIC

RCLK

REN1

REN2

2655 drw 01

Q0 - Q8

SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

DECEMBER 1995

1996 Integrated Device Technology, Inc

DSC-2655/6

For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391. 5.07

12 3 4 5 6 7...19

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与IDT72421L50PFB相关器件

型号	品牌	获取价格	描述	数据表
IDT72423L10SO	IDT	获取价格	FIFO, 64X1, 7.5ns, Synchronous, CMOS, PDSO24, 0.300 INCH, 0.050 INCH PITCH, SOIC-24
IDT72423L10SO8	IDT	获取价格	FIFO, 64X1, Synchronous, CMOS, PDSO24, 0.300 INCH, 0.050 INCH PITCH, SOIC-24
IDT72423L10TD	IDT	获取价格	FIFO, 64X1, Synchronous, CMOS, CDIP24, 0.300 INCH, THIN, CERDIP-24
IDT72423L10TP	ETC	获取价格	x1 Synchronous FIFO
IDT72423L12SO	IDT	获取价格	FIFO, 64X1, 8ns, Synchronous, CMOS, PDSO24, 0.300 INCH, 0.050 INCH PITCH, SOIC-24
IDT72423L12TP	IDT	获取价格	FIFO, 64X1, 8ns, Synchronous, CMOS, PDIP24, 0.300 INCH, 0.100 INCH PITCH, THIN, PLASTIC, D
IDT72423L15SO	ETC	获取价格	x1 Synchronous FIFO
IDT72423L15SO8	IDT	获取价格	FIFO, 64X1, Synchronous, CMOS, PDSO24, 0.300 INCH, 0.050 INCH PITCH, SOIC-24
IDT72423L15TD	IDT	获取价格	FIFO, 64X1, Synchronous, CMOS, CDIP24, 0.300 INCH, THIN, CERDIP-24
IDT72423L15TDB	IDT	获取价格	FIFO, 64X1, 10ns, Synchronous, CMOS, CDIP24, 0.300 INCH, THIN, CERDIP-24

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