IDT723623/723633/723643BUS-MATCHINGSyncFIFO™
256 x 36, 512 x 36, 1,024 x 36
COMMERCIALTEMPERATURERANGE
PINDESCRIPTIONS
Symbol
A0-A35
AE
Name
I/O
I/O
O
Description
PortAData
36-bitbidirectionaldataportforsideA.
Almost-Empty
Flag (Port B)
ProgrammableAlmost-EmptyflagsynchronizedtoCLKB.ItisLOWwhenthenumberofwordsintheFIFO
islessthanorequaltothevalueintheAlmost-EmptyBoffsetregister,X.
AF
Almost-Full
Flag (Port A)
O
ProgrammableAlmost-FullflagsynchronizedtoCLKA.ItisLOWwhenthenumberofemptylocationsinthe
FIFOis less thanorequaltothevalueintheAlmost-FullAoffsetregister,Y.
B0-B35
PortBData
I/O
I
36-bitbidirectionaldataportforsideB.
BE/FWFT Big-Endian/
FirstWord
This is a dual purpose pin. During Master Reset, a HIGHon BE will select Big-Endian operation. In this case,
dependingonthe bus size, the mostsignificantbyte orwordwrittentoPortAis readfromPortBfirst. A
LOWonBEwillselectLittle-Endianoperation. Inthiscase,theleastsignificantbyteorwordwrittentoPortA
is readfromPortBfirst. AfterMasterReset,this pinselects thetimingmode. AHIGHonFWFTselects IDT
Standardmode,aLOWselectsFirstWordFallThroughmode.Oncethetimingmodehasbeenselected,the
levelonFWFTmustbestaticthroughoutdeviceoperation.
A HIGH on this pin enables either byte or word bus width on Port B, depending on the state of SIZE. A
LOWselects longwordoperation. BMworks withSIZEandBEtoselectthe bus size andendian
arrangementforPortB.ThelevelofBMmustbestaticthroughoutdeviceoperation.
Fall Through
(1)
BM
Bus-Match
Select(PortB)
I
CLKA
CLKB
CSA
PortAClock
PortBClock
I
I
CLKAis a continuous clockthatsynchronizes alldata transfers throughPortAandcanbe asynchronous or
coincidenttoCLKB. FF/IRand AF are synchronizedtothe LOW-to-HIGHtransitionofCLKA.
CLKBis a continuous clockthatsynchronizes alldata transfers throughPortBandcanbe asynchronous or
coincidenttoCLKA. EF/ORandAEaresynchronizedtotheLOW-to-HIGHtransitionofCLKB.
CSA mustbe LOWtoenable toLOW-to-HIGHtransitionofCLKAtoreadorwrite onPortA. The A0-A35
outputsareinthehigh-impedancestatewhenCSAisHIGH.
Port A Chip
Select
I
CSB
Port B Chip
Select
I
CSB must be LOW to enable a LOW-to-HIGH transition of CLKB to read or write on Port B. The B0-B35
outputsareinthehigh-impedancestatewhenCSBisHIGH.
EF/OR
Empty/Output
Ready Flag
(Port B)
O
This is a dualfunctionpin. Inthe IDTStandardmode, theEF functionis selected. EF indicates whetheror
nottheFIFOmemoryisempty. IntheFWFTmode,theORfunctionisselected.ORindicatesthepresenceofvalid
dataontheB0-B35outputs,availableforreading.EF/ORissynchronizedtotheLOW-to-HIGHtransitionofCLKB.
ENA
ENB
FF/IR
PortAEnable
PortBEnable
I
I
ENAmustbe HIGHtoenable a LOW-to-HIGHtransitionofCLKAtoreadorwrite data onPortA.
ENBmustbe HIGHtoenable a LOW-to-HIGHtransitionofCLKBtoreadorwrite data onPortB.
Full/Input
Ready Flag
(Port A)
O
This is a dualfunctionpin. Inthe IDTStandardmode, theFF functionis selected. FF indicates whetheror
nottheFIFOmemoryis full.IntheFWFTmode,theIRfunctionis selected.IRindicates whetherornotthere
is spaceavailableforwritingtotheFIFOmemory. FF/IRis synchronizedtotheLOW-to-HIGHtransitionof
CLKA.
FS1/SEN FlagOffset
I
I
FS1/SENandFS0/SDaredual-purposeinputs usedforflagoffsetregisterprogramming.DuringReset,
FS1/SENandFS0/SD,togetherwithSPM,selecttheflagoffsetprogrammingmethod.Threeoffsetregister
programmingmethods are available:automaticallyloadone ofthree presetvalues (8, 16, or64), parallel
loadfromPortA, andserialload.
Select1/
SerialEnable,
FS0/SD
FlagOffset
Whenserialloadisselectedforflagoffsetregisterprogramming,FS1/SENisusedasanenablesynchronous
totheLOW-to-HIGHtransitionofCLKA.WhenFS1/SENis LOW,arisingedgeonCLKAloadthebitpresent
onFS0/SDintothe XandYregisters. The numberofbitwrites requiredtoprogramthe offsetregisters is 16
for the IDT723623, 18 for the IDT723633, and 20 for the IDT723643. The first bit write stores the Y-register
MSBandthelastbitwritestorestheX-registerLSB.
Select0/
SerialData
MBA
MBB
Port A Mailbox
Select
I
I
A HIGH level on MBA chooses a mailbox register for a Port A read or write operation.
Port B Mailbox
Select
A HIGH level on MBB chooses a mailbox register for a Port B read or write operation. When the B0-B35
outputs areactive,aHIGHlevelonMBBselects datafromthemail1registerforoutputandaLOWlevel
selectsFIFOdataforoutput.
MBF1
Mail1Register
Flag
O
MBF1issetLOWbyaLOW-to-HIGH transitionofCLKA that writesdatatothemail1register.Writesto
themail1registerareinhibitedwhileMBF1is LOW.MBF1is setHIGHbyaLOW-to-HIGHtransitionofCLKB
when a Port B read is selected and MBB is HIGH. MBF1 is set HIGH following either a Reset (RS1) or Partial
Reset(PRS).
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