Datasheet > IDT71V67613S183BQ

IDT71V67613S183BQ

更新时间： 2024-11-08 07:47:03

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
23页	510K
描述
Cache SRAM, 256KX36, 3.3ns, CMOS, PBGA165, 13 X 15 MM, FINE PITCH, BGA-165

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256K X 36, 512K X 18

3.3VSynchronousSRAMs

3.3V I/O, Burst Counter

Advance

Information

IDT71V67613

IDT71V67813

PipelinedOutputs,SingleCycleDeselect

256K x 36/512K x 18. The IDT71V67613/7813 SRAMs contain write,

data, address and control registers. Internal logic allows the SRAM to

generateaself-timedwritebaseduponadecisionwhichcanbeleftuntil

theendofthewritecycle.

Features

◆

256K x 36, 512K x 18 memory configurations

◆

Supports high system speed:

– 200MHz 3.1ns clock access time

– 183MHz 3.3ns clock access time

LBO input selects interleaved or linear burst mode

Theburstmodefeatureoffersthehighestlevelofperformancetothe

systemdesigner,astheIDT71V67613/7813canprovidefourcyclesof

dataforasingleaddresspresentedtotheSRAM. Aninternalburstaddress

counteracceptsthefirstcycleaddressfromtheprocessor,initiatingthe

accesssequence.Thefirstcycleofoutputdatawillbepipelinedforone

cycle before it is available on the next rising clock edge. If burst mode

operationisselected(ADV=LOW),thesubsequentthreecyclesofoutput

datawillbeavailabletotheuseronthenextthreerisingclockedges. The

orderofthesethreeaddressesaredefinedbytheinternalburstcounter

andthe LBO inputpin.

◆

Self-timed write cycle with global write control (GW), byte

write enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

3.3V I/O supply (VDDQ)

◆

Packaged in a JEDEC Standard 100-pin thin plastic quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array (fBGA).

TheIDT71V67613/7813SRAMsutilizeIDT’slatesthigh-performance

CMOSprocessandarepackagedinaJEDECstandard14mmx20mm

100-pin thin plasticquadflatpack(TQFP)aswellasa119ballgridarray

(BGA) and 165 fine pitch ball grid array (fBGA).

Description

The IDT71V67613/7813 are high-speed SRAMs organized as

PinDescriptionSummary

A -A

Address Inputs

Input

Output

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enable

CS , CS

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

BWE

(1)

BW , BW , BW , BW

CLK

ADV

ADSC

ADSP

LBO

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Synchronous

Asynchronous

N/A

TMS

TDI

Test Mode Select

Test Data Input

N/A

TCK

TDO

Test Clock

N/A

Test Data Output

N/A

I/O -I/O , I/O -I/O

Data Input / Output

Core Power, I/O Power

Ground

Synchronous

N/A

DD DDQ

V , V

Supply

N/A

5312 tbl 01

NOTE:

1. BW3 and BW4 are not applicable for the IDT71V67813.

JULY 2001

DSC-5312/01

12 3 4 5 6 7...23

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与IDT71V67613S183BQ相关器件

型号	品牌	获取价格	描述	数据表
IDT71V67613S200BG	IDT	获取价格	Cache SRAM, 256KX36, 3.1ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
IDT71V67702	IDT	获取价格	256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs,
IDT71V67702S75B	IDT	获取价格	Cache SRAM, 256KX36, 7.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
IDT71V67702S75BG	IDT	获取价格	256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs,
IDT71V67702S75BG8	IDT	获取价格	Cache SRAM, 256KX36, 7.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
IDT71V67702S75BGI	IDT	获取价格	256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs,
IDT71V67702S75BQ	IDT	获取价格	256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs,
IDT71V67702S75BQG	IDT	获取价格	Cache SRAM, 256KX36, 7.5ns, CMOS, PBGA165, 13 X 15 MM, FPBGA-165
IDT71V67702S75BQGI	IDT	获取价格	Cache SRAM, 256KX36, 7.5ns, CMOS, PBGA165, 13 X 15 MM, FPBGA-165
IDT71V67702S75BQI	IDT	获取价格	256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs,

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