Datasheet > IDT71V65802133PF

IDT71V65802133PF

更新时间： 2024-11-09 08:46:43

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
26页	484K
描述
ZBT SRAM, 512KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, 1 MM PITCH, PLASTIC, MO-136DJ, TQFP-100

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IDT71V65802133PF 数据手册

256K x 36, 512K x 18

IDT71V65602/Z

IDT71V65802/Z

3.3VSynchronousZBT™SRAMs

2.5V I/O, Burst Counter

PipelinedOutputs

Features

AddressandcontrolsignalsareappliedtotheSRAMduringoneclock

cycle,andtwocycleslatertheassociateddatacycleoccurs,beitreadorwrite.

The IDT71V65602/5802 contain data I/O, address and control signal

registers.Outputenableistheonlyasynchronoussignalandcanbeusedto

disabletheoutputsatanygiventime.

A Clock Enable (CEN) pin allows operation of the IDT71V65602/5802

tobesuspendedaslongasnecessary.Allsynchronousinputsareignored

when(CEN)ishighandtheinternaldeviceregisterswillholdtheirprevious

values.

◆

256K x 36, 512K x 18 memory configurations

◆

Supports high performance system speed - 150MHz

(3.8ns Clock-to-Data Access)

◆

ZBT^TMFeature - No dead cycles between write and read cycles

◆

Internally synchronized output buffer enable eliminates the

need to control OE

Single R/W (READ/WRITE) control pin

Positive clock-edge triggered address, data, and control

◆

There are three chip enable pins (CE¹, CE2, CE2) that allow the

user to deselect the device when desired. If any one of these three are not

asserted when ADV/LDis low, no new memory operation can be initiated.

However,anypendingdatatransfers(readsorwrites)willbecompleted.The

databuswilltri-statetwocyclesafterchipisdeselectedorawriteisinitiated.

The IDT71V65602/5802 have an on-chip burst counter. In the burst

mode, the IDT71V65602/5802 can provide four cycles of data for a single

addresspresentedtotheSRAM.Theorderoftheburstsequenceisdefined

bytheLBOinputpin.TheLBOpinselectsbetweenlinearandinterleavedburst

sequence.TheADV/LDsignalisusedtoloadanewexternaladdress(ADV/

LD=LOW) orincrementtheinternalburstcounter(ADV/LD=HIGH).

The IDT71V65602/5802 SRAM utilize IDT's latest high-performance

signal registers for fully pipelined applications

4-word burst capability (interleaved or linear)

Individual byte write (BW1 - BW4) control (May tie active)

Three chip enables for simple depth expansion

3.3V power supply (±5%)

2.5V I/O Supply (VDDQ)

Power down controlled by ZZ input

Packaged in a JEDEC standard 100-pin plastic thin quad and

◆

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch

ball grid array (fBGA)

Description

The IDT71V65602/5802 are 3.3V high-speed 9,437,184-bit CMOSprocess,andarepackagedinaJEDECStandard14mmx20mm100-

(9Megabit)synchronousSRAMs.Theyaredesignedtoeliminatedead

bus cycles when turning the bus around between reads and writes, or

writesandreads. Thus, theyhavebeengiventhenameZBT^TM, orZero

Bus Turnaround.

pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array (BGA)

and a 165 fine pitch ball grid array (fBGA).

PinDescriptionSummary

-A18

Address Inputs

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enables

1, CE

, CE

Output Enable

R/W

Read/Write Signal

Clock Enable

CEN

Individual Byte Write Selects

Clock

1, BW

, BW

CLK

ADV/LD

Advance burst address / Load new address

Linear / Interleaved Burst Order

Sleep Mode

Synchronous

Static

LBO

Asynchronous

Synchronous

Static

I/O

0-I/O31, I/OP1-I/OP4

Data Input / Output

Core Power, I/O Power

Ground

DD, VDDQ

Supply

Static

5303 tbl 01

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola, Inc.

FEBRUARY 2007

DSC-5303/06

12 3 4 5 6 7...26

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与IDT71V65802133PF相关器件

型号	品牌	获取价格	描述	数据表
IDT71V65802133PFI	IDT	获取价格	ZBT SRAM, 512KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, 1 MM PITCH, PLASTIC,
IDT71V65802150BGI	IDT	获取价格	ZBT SRAM, 512KX18, 3.8ns, CMOS, PBGA119, 14 X 22 MM, MS-028AA, BGA-119
IDT71V65802150BQ	IDT	获取价格	ZBT SRAM, 512KX18, 3.8ns, CMOS, PBGA165, 13 X 15 MM, FPBGA-165
IDT71V65802150BQI	IDT	获取价格	ZBT SRAM, 512KX18, 3.8ns, CMOS, PBGA165, 13 X 15 MM, FPBGA-165
IDT71V65802150PF	IDT	获取价格	ZBT SRAM, 512KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, 1 MM PITCH, PLASTIC,
IDT71V65802150PFI	IDT	获取价格	ZBT SRAM, 512KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, 1 MM PITCH, PLASTIC,
IDT71V65802S100B	IDT	获取价格	ZBT SRAM, 512KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119
IDT71V65802S100BG	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V65802S-100BG	IDT	获取价格	256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
IDT71V65802S100BGG	IDT	获取价格	ZBT SRAM, 512KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, BGA-119

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