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IDT7027L35PF PDF预览

IDT7027L35PF

更新时间: 2024-11-24 22:35:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
19页 161K
描述
HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM

IDT7027L35PF 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-100针数:100
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.42
最长访问时间:35 ns其他特性:INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN; LOW POWER STANDBY MODE
I/O 类型:COMMONJESD-30 代码:S-PQFP-G100
JESD-609代码:e0长度:14 mm
内存密度:524288 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端口数量:2
端子数量:100字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX16输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP100,.63SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.015 A
最小待机电流:4.5 V子类别:SRAMs
最大压摆率:0.255 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:14 mmBase Number Matches:1

IDT7027L35PF 数据手册

 浏览型号IDT7027L35PF的Datasheet PDF文件第2页浏览型号IDT7027L35PF的Datasheet PDF文件第3页浏览型号IDT7027L35PF的Datasheet PDF文件第4页浏览型号IDT7027L35PF的Datasheet PDF文件第5页浏览型号IDT7027L35PF的Datasheet PDF文件第6页浏览型号IDT7027L35PF的Datasheet PDF文件第7页 
HIGH-SPEED  
IDT7027S/L  
32K x 16 DUAL-PORT  
STATIC RAM  
Features  
external logic  
True Dual-Ported memory cells which allow simultaneous  
IDT7027 easily expands data bus width to 32 bits or more  
using the Master/Slave select when cascading more than  
one device  
M/S = VIH for BUSY output flag on Master,  
M/S = VIL for BUSY input on Slave  
access of the same memory location  
High-speed access  
Military: 25/35/55ns (max)  
Industrial: 25ns (max.)  
– Commercial:20/25/35/55ns (max.)  
Low-power operation  
Busy and Interrupt Flags  
On-chip port arbitration logic  
IDT7027S  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in 100-pin Thin Quad Flatpack (TQFP) and 108-pin  
Ceramic PinGridArray(PGA)  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
IDT7027L  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
Separate upper-byte and lower-byte control for bus  
matching capability.  
Industrial temperature range (40°C to +85°C) is available  
for selected speeds  
Dual chip enables allow for depth expansion without  
FunctionalBlockDiagram  
R/WL  
UBL  
WR  
R/  
UBR  
CE0L  
CE0R  
CE1L  
CE1R  
OER  
LBR  
OEL  
LBL  
I/O8-15L  
I/O8-15R  
I/O  
Control  
I/O  
Control  
0-7L  
I/O  
I/O0-7R  
(1,2)  
(1,2)  
BUSYR  
BUSYL  
.
32Kx16  
A14R  
A0R  
A14L  
Address  
Decoder  
Address  
Decoder  
MEMORY  
ARRAY  
7027  
A0L  
A14L  
A14R  
A0R  
CE0R  
A0L  
CE0L  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE1L  
OEL  
CE1R  
OER  
WL  
R/  
R/WR  
SEML  
INTL  
SEMR  
(2)  
(2)  
INTR  
M/S(2)  
3199 drw 01  
NOTES:  
1. BUSY is an input as a Slave (M/S=VIL) and an output as a Master (M/S=VIH).  
2. BUSY and INT are non-tri-state totem-pole outputs (push-pull).  
MAY 2000  
1
DSC 3199/7  
©2000IntegratedDeviceTechnology,Inc.  

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