IDT54/74FCT138
IDT54/74FCT138A
IDT54/74FCT138C
FAST CMOS
1-OF-8 DECODER
WITH ENABLE
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• IDT54/74FCT138 equivalent to FAST speed
• IDT54/74FCT138A 35% faster than FAST
• IDT54/74FCT138C 40% faster than FAST
• Equivalent to FAST speeds output drive over full tem-
perature and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
The IDT54/74FCT138/A/C are 1-of-8 decoders built using
an advanced dual metal CMOS technology. The IDT54/
74FCT138/A/C accept three binary weighted inputs (A0, A1,
A2) and, when enabled, provide eight mutually exclusive
active LOW outputs (O0 - O7). The IDT54/74FCT138/A/C
feature three enable inputs, two active LOW (E1, E2) and one
active HIGH (E3). All outputs will be HIGH unless E1 and E2
are LOW and E3 is HIGH. This multiple enable function allows
easy parallel expansion of the device to a 1-of-32 (5 lines to
32 lines) decoder with just four IDT54/74FCT138/A/C devices
and one inverter.
• Substantially lower input current levels than FAST
(5µA max.)
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing # 5962-87654 is listed on this
function. Refer to section 2.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
A2
A1
A0
E3
E1 E2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
A
A
E
0
1
2
1
Vcc
O
O
0
P16-1,
D16-1,
SO16-1
&
1
O2
O3
O4
2
3
7
E
E
O
E16-1
O
5
O6
GND
DIP/SOIC/CERPACK
TOP VIEW
INDEX
3
2
20 19
18
4
5
6
7
8
A2
E1
NC
O1
O2
NC
1
17
16
15
14
L20-2
2
O3
O4
E
O7
O6
O5
O4
O3
O2
O1
O0
E3
10 11 12 13
9
2581 drw 02
2581 drw 01
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MAY 1992
1992 Integrated Device Technology, Inc.
7.3
DSC-4625/3
1