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IDT54821BTLB PDF预览

IDT54821BTLB

更新时间: 2024-10-28 15:43:31
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
9页 178K
描述
Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, CQCC28, LCC-28

IDT54821BTLB 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN,针数:28
Reach Compliance Code:unknown风险等级:5.84
系列:FCTJESD-30 代码:S-CQCC-N28
JESD-609代码:e0长度:11.4554 mm
逻辑集成电路类型:BUS DRIVER位数:10
功能数量:1端口数量:2
端子数量:28最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:2.54 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:11.4554 mmBase Number Matches:1

IDT54821BTLB 数据手册

 浏览型号IDT54821BTLB的Datasheet PDF文件第3页浏览型号IDT54821BTLB的Datasheet PDF文件第4页浏览型号IDT54821BTLB的Datasheet PDF文件第5页浏览型号IDT54821BTLB的Datasheet PDF文件第6页浏览型号IDT54821BTLB的Datasheet PDF文件第8页浏览型号IDT54821BTLB的Datasheet PDF文件第9页 
IDT54/74FCT821AT/BT/CT, 823/825AT/BT/CT/DT  
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
SWITCHING CHARACTERISTICS OVER OPERATING RANGE  
FCT821/823/825CT  
FCT823DT  
Com'l.  
Min (2)  
Com'l.  
Mil.  
Max.  
Symbol  
Parameter  
Propagation Delay  
CP to Y OE = LOW)  
Condition(1)  
= 50pF  
= 500  
= 300pF(4)  
= 500  
= 50pF  
= 500  
Min (2)  
.
Max. Min (2)  
.
.
Max.  
Unit  
t
t
PLH  
PHL  
C
L
1.5  
6.0  
12.5  
1.5  
7.0  
13.5  
1.5  
1.5  
2.0  
1.0  
3.0  
0
5.0  
ns  
I
(
R
L
C
L
1.5  
3.0  
1.5  
3.0  
0
1.5  
3.0  
1.5  
3.0  
0
8.5  
5.0  
R
L
t
t
t
t
t
t
t
t
SU  
H
Set-up Time HIGH or LOW  
to CP  
Hold Time HIGH or LOW  
to CP  
C
L
ns  
ns  
ns  
ns  
ns  
ns  
ns  
D
I
R
L
D
I
SU  
H
Set-up Time HIGH or LOW  
EN to CP  
Hold Time HIGH or LOW  
EN to CP  
PHL  
REM  
W
Propagation Delay, CLR to Y  
Recovery Time CLR to CP  
Clock Pulse Width  
I
1.5  
6.0  
6.0  
8.0  
1.5  
6.0  
6.0  
8.5  
1.5  
3.0  
3.0  
(3)  
HIGH or LOW  
(3)  
W
CLR Pulse Width LOW  
6.0  
1.5  
6.0  
1.5  
3.0  
1.5  
ns  
ns  
t
t
PZH  
PZL  
Output Enable Time OE to Y  
I
C
L
= 50pF  
= 500  
= 300pF(4)  
7.0  
8.0  
4.8  
R
L
C
L
1.5  
1.5  
1.5  
12.5  
6.0  
1.5  
1.5  
1.5  
13.5  
6.0  
1.5  
1.5  
1.5  
9.0  
4.0  
4.0  
R
L
= 500  
= 5pF(4)  
= 500  
= 50pF  
= 500  
t
t
PHZ  
PLZ  
Output Disable Time OE to Y  
I
CL  
ns  
R
L
C
R
L
6.5  
6.5  
L
NOTES:  
1. See test circuit and waveforms.  
2567 tbl 09  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. This parameter is guaranteed but not tested.  
4. This condition is guaranteed but not tested.  
6.21  
7

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