Datasheet > ICS9DB206GT

ICS9DB206GT

更新时间： 2024-11-24 05:07:07

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
7页	95K
描述
Clock Driver

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数据手册

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ICS9DB206GT 数据手册

Integrated

Circuit

Systems, Inc.

ICS9DB206

Advance Information

Zero Delay Buffer for PCI-Express

Recommended Application:

Pin Configuration

•

Zero-delay buffer for PCI-Express

PLL_BW 1

CLK_INT 2

CLK_INC 3

FS0 4

28 VDDA

27 GNDA

26 IREF

Zero-delay buffer for 0.7V Differential CPU and SATA

clocks

25 FS1

Output Features:

PCIEXT0 5

PCIEXC0 6

VDD 7

24 PCIEXT5

23 PCIEXC5

22 VDD

•

6 - 0.7V current mode differential output pairs (HSCL)

OE pins control output pairs (0:2) and (3:5)

Output pair 0 always tracks the input frequency

GND 8

21 GND

PCIEXT1 9

PCIEXC1 10

PCIEXT2 11

PCIEXC2 12

VDD 13

20 PCIEXT4

19 PCIEXC4

18 PCIEXT3

17 PCIEXC3

16 VDD

Key Specifications:

•

Cycle-to-cycle jitter < 50ps

Output-to-output skew < 50 ps

Features/Benefits:

OE0 14

15 OE1

•

Supports Serial-ATA

FS pins allow optional 5/4 multiplication of input

frequency to give 125 MHz outputs at F_IN= 100 MHz

28-pin SSOP & TSSOP

•

Spread Spectrum Compatible

Adjustable PLL Bandwidth

Ratio of Output Frequency to Input Frequency

FS0

PCIEX0

PCIEX1

PCIEX2

5/4

FS1

PCIEX3

PCIEX4

PCIEX5

5/4

Output Enable Functionality

OE0

PCIEX(0:2)

Hi-Z

Running

OE1

PCIEX(3:5)

Hi-Z

Running

0835—07/24/03

ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.

ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.

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与ICS9DB206GT相关器件

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ICS9DB206YFT	IDT	获取价格	PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), PDSO28, 0.209 INCH, MO-150
ICS9DB206YGLFT	IDT	获取价格	PLL Based Clock Driver, 6 True Output(s), 0 Inverted Output(s), PDSO28, 0.173 INCH, 0.65 M
ICS9DB306	ICSI	获取价格	PCI Express, Jitter Attenuator
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ICS9DB306BFLF	IDT	获取价格	PLL Based Clock Driver, 9DB Series, 6 True Output(s), 0 Inverted Output(s), PDSO28, 5.30 X
ICS9DB306BFLFT	IDT	获取价格	PLL Based Clock Driver, 9DB Series, 6 True Output(s), 0 Inverted Output(s), PDSO28, 5.30 X
ICS9DB306BFT	ICSI	获取价格	PCI Express, Jitter Attenuator
ICS9DB306BL	ICSI	获取价格	PCI Express, Jitter Attenuator