Datasheet > ICS8MJ0-100.000AJT

ICS8MJ0-100.000AJT

更新时间： 2024-11-08 08:34:47

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艾迪悌 - IDT		/
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4页	103K
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Oscillator

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PRELIMINARY

ICS8MX0

Integrated

Circuit

Systems, Inc.

LVCMOS/LVTTL CLOCK OSCILLATOR

ICS8MX0

LOW JITTER, HIGH FREQUENCY XTAL OSCILLATOR

• Stable, ultra low jitter, LVCMOS/LVTTL clock generation

• For Gigabit Ethernet, Fibre Channel, PCI-Express, other applications

• Clock output frequencies from 75MHz to 250MHz

• One single-ended LVCMOS/LVTTL clock output

• Output Enable (OE) pin (high impedance – when low)

• Small 4-pin 5mm x 7mm x 1.5mm SMT ceramic package

• Low profile package allows back-side PCB mounting

• Pb-free RoHS compliant (by default; no additional code required)

• 3.3V or 2.5V device power supply options

8Mx0

(Top View )

• Commercial (0 to +70 C) and Industrial (-40 to +85 C) temperatures

• Frequency stability of 50ppm or 100ppm

(including initial accuracy, operating temperature variation, supply voltage

variation, load variation, reflow drift, and aging for 10 years)

• Low phase jitter < 1 ps rms maximum (12kHz to 20MHz)

4-pin CERHERMETIC 5mm x 7mm x 1.5mm SMT

ELECTRICAL SPECIFICATIONS

Unless stated otherwise, V_DD= 3.3V 0.3V or 2.5V 5ꢀ, T_A= 0°C to +70°C (commercial), T_A= -40°C to +85°C (industrial)

Specifications

Min.

Typ.

Max.

Units

Item

Symbol

Test Conditions

DC Characteristics

Power Supply

(V_DD, GND pins)

3.0

3.3

2.5

3.6

3.3V operation

Power Supply Voltage

V_DD

2.375

2.625

2.5V operation (8MJ0 and 8MK0 only)

Power Supply Current

Current w/Output Disabled

Input Capacitance

I_DD

OE = V_DD

I_OED

C_IN

V_IH

<0.6

OE = GND

Output Enable

(OE pin)

LVCMOS/LVTTL

Input High Voltage

0.7 * V_DD

Input Low Voltage

V_IL

0.3 * V_DD

Input High Current

I_IH

µA

V_DD= V_IN= 3.6V or 2.625V

Input Low Current

I_IL

-150

V_DD= 3.6V or 2.625V, V_IN= 0V

Internal Pullup Resistor

Output High Voltage¹

Output Low Voltage¹

Output Load Condition

Output Impedance

R_PULLUP

V_OH

V_OL

C_L

kΩ

Clock Output

Level (OUT pin)

LVCMOS/LVTTL

V_DD- 0.4

V_DD= 3.3V 0.3V or 2.5V 5ꢀ

0.4

f_O≤ 250MHz

R_OUT

AC Characteristics

Output

(OUT pin)

Output Frequency Range

250

100

MHz

All conditions

ppm p-p 8MH0 & 8MK0

ppm p-p 8MG0 & 8MJ0

Includes frequency set, V_DD, T

load variation, reflow drift, 10 yr. aging

≤ Max. pF

A and

Frequency Stability Error

f/f_O

Output Duty Cycle

Output Rise Time

Output Fall Time

odc

t_R

ꢀ

V_TH= V_DD/ 2, C_L

1.5

20ꢀ to 80ꢀ of V_DDC_L

≤

Max. pF

t_F

Oscillator Start-up Time

RMS Phase Jitter, Random²t jit (Ø)

t_OSC

ps rms

Time at Min. V_DD(3.0V or 2.375V) to be 0s

design target

Jitter

t_DS

t_RS

0.2

Deterministic

Random, σ of random jitter

t_RMS

Root Mean Square,

Peak-to-Peak

σ of total jitter distribution

t_P-P

t_acc

Accumulated Jitter, n = 2 to 50,000 cycles

NOTE 1: Outputs terminated with 50

NOTE 2: Measured using an Aeroflex PN9500 with a 12kHz to 20MHz integration range.

NOTE 3: Measured using a Wavecrest SIA-3000.

Ω to V_DD/2. See Parameter Measurement Information, Output Load AC Test Circuit Diagrams.

Supply Voltage & Frequency Accuracy

G =

H =

J =

3.3V / 3.3V

2.5V / 3.3V

50 ppm

100 ppm

50 ppm

The Preliminary Information presented herein represents a product in prototyping or pre-production. The

noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorpo-

rated (ICS) reserves the right to change any circuitry or specifications without notice.

K =

100 ppm

8Mx0AJ

www.icst.com/products/hiperclocks.html

REV.C NOVEMBER 18, 2005

12 3 4

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